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In this study, the channel potential of inhibited strings in 3D NAND flash memory using a bandgap-engineered tunneling oxide (BE-TOX) structure is analyzed. The equivalent oxide thickness (EOT) of the structure using BE-TOX was designed to be the same as the conventional 3D NAND flash memory, and the channel potentials of the down coupling phenomenon (DCP) and natural local self-boosting (NLSB) effect were analyzed. As a result, the BE-TOX structure was confirmed to have a higher channel potential in the DCP and NLSB than the conventional structure, making it relatively effective for program disturbance. The main reason for the difference in the channel potential between the BE-TOX and conventional structures is that adjacent cells have different threshold voltages (Vth). When the same program voltage (VPGM) and program time (TPGM) were applied during the program operation, Vth decreased in the BE-TOX structure, which increased the channel potential when DCP and NLSB occurred. Finally, a simulation was conducted by varying the thicknesses of the oxide and nitride in the BE-TOX structure. Despite the EOT being fixed and the thicknesses of both nitride and oxide being varied, the channel potential was affected. [ABSTRACT FROM AUTHOR]

In this paper, we propose an optimized device structure with a highly stable process that addresses threshold voltage shift issues in the String-Select-Line (SSL) and Ground-Select-Line (GSL) gates using ferroelectric memory in 3D NAND flash memory applications. The proposed device utilizes nickel (Ni) instead of tungsten (W) for the GSL and SSL gates, enabling optimized polarization properties during the annealing process and leveraging the disparity in thermal expansion coefficients. Notably, the difference in thermal expansion coefficient from tungsten (W), employed in other Word Line (WL) gates, allows effective control over polarization properties. To validate the proposed structure, we fabricated and measured a Metal–Ferroelectric–Insulator–Silicon (MFIS) capacitor utilizing Hafnium–Zirconium Oxide (HZO) material. The measurement results indicate that a change in the upper metal layer results in a more than fivefold increase in the variance of polarization characteristics between the WL gates (responsible for the memory function) and the SSL and GSL gates dedicated to channel control. In addition, process simulation was conducted using the same device structure, confirming the application of tensile stress to the HZO thin film in the case of a W electrode and compressive stress in the case of a Ni electrode. Furthermore, applying this controlled polarization characteristic parameter to the 3D NAND flash memory structure revealed a reduction in the threshold voltage shift of the control gate from a previous change of 2.6 V or more to 0.05 V, facilitating stable control. [ABSTRACT FROM AUTHOR]

This paper proposes an optimized program operation method for ferroelectric NAND (FE-NAND) flash memory utilizing the gate-induced drain leakage (GIDL) program and validated through simulations. The program operation was performed by setting the time for the unselected cell to reach the pass voltage (Vpass) to 0.1 µs, 0.2 µs, and 0.3 µs, respectively. As the time for the unselected word line (WL) to reach Vpass increases, the channel potential increases due to a decrease in the electron–hole recombination rate. After the program operation, the threshold voltage (Vth) shift of the selected cell and the pass disturb of the unselected cells according to the Vpass condition were analyzed. Consequently, there was a more significant change in Vth among selected cells compared to the time for unselected cells to reach Vpass as 0.1 µs. The findings of this study suggest an optimal program operation that increases slowly and decreases rapidly through the variation of Vth according to the program operation. By performing the proposed program operation, we confirmed that low-power operation is achievable by reducing the WL voltage by 2 V and the bit line (BL) voltage by 1 V, in contrast to the conventional GIDL program. [ABSTRACT FROM AUTHOR]

In this study, we fabricate a Pt/TiN/SnOx/Pt memory device using reactive sputtering to explore its potential for neuromorphic computing. The TiON interface layer, formed when TiN comes into contact with SnO2, acts as an oxygen vacancy reservoir, aiding the creation of conductive filaments in the switching layer. Our SnOx-based device exhibits remarkable endurance, with over 200 DC cycles, ON/FFO ratio (>20), and 104 s retention. Set and reset voltage variabilities are impressively low, at 9.89% and 3.2%, respectively. Controlled negative reset voltage and compliance current yield reliable multilevel resistance states, mimicking synaptic behaviors. The memory device faithfully emulates key neuromorphic characteristics, encompassing both long-term potentiation (LTP) and long-term depression (LTD). The filamentary switching mechanism in the SnOx-based memory device is explained by an oxygen vacancy concentration gradient, where current transport shifts from Ohmic to Schottky emission dominance across different resistance states. These findings exemplify the potential of SnOx-based devices for high-density data storage memory and revolutionary neuromorphic computing applications. [ABSTRACT FROM AUTHOR]

Memristors, owing to their uncomplicated structure and resemblance to biological synapses, are predicted to see increased usage in the domain of artificial intelligence. Additionally, to augment the capacity for multilayer data storage in high-density memory applications, meticulous regulation of quantized conduction with an extremely low transition energy is required. In this work, an a-HfSiOx-based memristor was grown through atomic layer deposition (ALD) and investigated for its electrical and biological properties for use in multilevel switching memory and neuromorphic computing systems. The crystal structure and chemical distribution of the HfSiOx/TaN layers were analyzed using X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS), respectively. The Pt/a-HfSiOx/TaN memristor was confirmed by transmission electron microscopy (TEM) and showed analog bipolar switching behavior with high endurance stability (1000 cycles), long data retention performance (104 s), and uniform voltage distribution. Its multilevel capability was demonstrated by restricting current compliance (CC) and stopping the reset voltage. The memristor exhibited synaptic properties, such as short-term plasticity, excitatory postsynaptic current (EPSC), spiking-rate-dependent plasticity (SRDP), post-tetanic potentiation (PTP), and paired-pulse facilitation (PPF). Furthermore, it demonstrated 94.6% pattern accuracy in neural network simulations. Thus, a-HfSiOx-based memristors have great potential for use in multilevel memory and neuromorphic computing systems. [ABSTRACT FROM AUTHOR]

In this work, we fabricated an ITO/WOX/TaN memristor device by reactive sputtering to investigate resistive switching and conduct analog resistive switching to implement artificial synaptic devices. The device showed good pulse endurance (104 cycles), a high on/off ratio (>10), and long retention (>104 s) at room temperature. The conduction mechanism could be explained by Schottky emission conduction. Further, the resistive switching characteristics were performed by additional pulse-signal-based experiments for more practical operation. Lastly, the potentiation/depression characteristics were examined for 10 cycles. The results thus indicate that the WOX-based devices are appropriate candidates for synaptic devices as well as next-generation nonvolatile memory. [ABSTRACT FROM AUTHOR]

In this work, the sputtered deposited WOx/TaOx switching layer has been studied for resistive random-access memory (RRAM) devices. Gradual SET and RESET behaviors with reliable device-to-device variability were obtained with DC voltage sweep cycling without an electroforming process. The memristor shows uniform switching characteristics, low switching voltages, and a high RON/ROFF ratio (~102). The transition from short-term plasticity (STP) to long-term potentiation (LTP) can be observed by increasing the pulse amplitude and number. Spike-rate-dependent plasticity (SRDP) and paired-pulse facilitation (PPF) learning processes were successfully emulated by sequential pulse trains. By reducing the pulse interval, the synaptic weight change increases due to the residual oxygen vacancy near the conductive filaments (CFs). This work explores mimicking the biological synaptic behavior and further development for next-generation neuromorphic applications. [ABSTRACT FROM AUTHOR]