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As‐grown GaN buffer layers have a significant electron concentration, which causes an increase in leakage current and a decrease in the breakdown voltage, VBR, of GaN High Electron Mobility Transistors (HEMTs). To prevent this, deep acceptor traps of density, NAT, are added to the GaN layer during growth. While a study on the effect of NAT on VBR is available in the literature, that on the effect of NAT on contact resistance, Rc, of source/drain contacts is lacking. Herein, the following is established using technology computer‐aided design simulations calibrated with measured current–voltage characteristics of ungated AlGaN/GaN structures: 1) Rc increases significantly with NAT and with the depth of the trap level from the conduction band. For trap level 2.5 eV below the conduction band, Rc doubles for an increase in NAT from 1 × 1016 to 5 × 1017 cm−3. 2) The variation of Rc with temperature is non‐monotonic. Over a temperature range of 300–450 K, Rc is nearly constant with temperature for NAT = 1 × 1016 cm−3 and decreases by 20% for NAT = 5 × 1017 cm−3, when traps are 2.5 eV below the conduction band. Also, the degradation of the transfer and output characteristics of GaN HEMTs due to a notable increase in Rc due to NAT is investigated. [ABSTRACT FROM AUTHOR]

In many nano-wire (NW) devices and during NW characterization, the contact is bonded on the surface or the side of the NW. The prior model of such side-bonded contacts assumes partial NW depletion and purely radial tunneling, both restricted to the contacted region. However, the real space-charge extends to the non-contacted NW, aided by the fringing field, and depletes the contacted NW fully for small NW radius, R. In addition, there are non-radial tunneling and generation-recombination near the contact edge. Supported by numerical calculations, the present work shows that when all the effects are included, different regimes of operation manifest in a side-bonded contact, and the space-charge and contact resistance can differ widely from prior predictions. Our calculations span contacts with barrier height, ϕb0 = 0.4–0.8 V on n-type silicon NWs of R = 7.5–20 nm and doping Nd = 1018–1020 cm−3 and include the effects of dielectric confinement, NW length, surface defects, image force barrier lowering, and heavy doping. We find that a side-bonded contact gets fully depleted at the contact edge for N d ≤ α F D [ 4 ε s ψ 0 / q R 2 ] , where ψ0 = contact potential and αFD = 0.73 (0.88) for air (SiO2) ambient. Furthermore, the behavior of a side-bonded contact approaches that of an end-bonded contact for N d ≤ α E B [ 4 ε s ψ 0 / q R 2 ] , where αEB = 0.16 (0.30), while surface space-charge widths in the two contacts match over a much wider Nd range for SiO2 ambient. We express the radial depletion width in the NW as an explicit function of the contact potential based on an available implicit relation. [ABSTRACT FROM AUTHOR]

Prior work calculated the contact resistivity, ρcN, of end-bonded metal contacts on n-type silicon NanoWires (NWs) of radius, R = 5–10 nm and doping, Nd = 1018–1020 cm−3; it described the internal physics briefly and qualitatively, and considered long NWs and high barrier heights, ϕb0 = 0.8–1.0 V. The present work extends the ρcN calculations to low ϕb0 = 0.4–0.6 V contacts with long NWs, and to low to high ϕb0 = 0.4–0.8 V contacts with short NWs of length, LNW ≤ long NW space-charge width. It calculates the space-charge and current distributions in contacts with LNW = 50 nm–2 μm and low to high ϕb0 = 0.4–0.8 V to provide the following insights: (i) radial non-uniformity in space-charge width and current are high enough to violate the plane space-charge edge assumption employed to model NW junctions analytically. The non-uniformity peaks at Nd where the bulk depletion width ≈2.14R for large metals and small surface charge. (ii) Low ϕb0 contacts are tunneling dominated, and their ρcN versus Nd behaviour differs qualitatively from that of high ϕb0 contacts. (iii) Practical LNW can be ≤long NW space-charge width, for Nd ≤ 1019 cm−3. Shortening the LNW reduces the space-charge non-uniformity and increases (reduces) the tunneling [generation-recombination (GR)] current. However, the current non-uniformity is unaffected, and the change in current or ρcN is disproportionately smaller than that in LNW, since the tunneling or GR causing these occur over a small region near the junction which is less affected by NW shortening. All our calculations include the effects of contact geometry, surface defects, dielectric confinement, image force, and heavy doping. Our work provides an experimentalist clear qualitative understanding over a wide range of conditions. [ABSTRACT FROM AUTHOR]

The device operation of the Charge Sheet Superjunction (CSSJ), whose specific on-resistance for a given breakdown voltage is even lower than those of a Superjunction (SJ), is described. A simple analytical model is developed for the drain-source capacitance of the CSSJ MOSFET, which can also be used for SJ MOSFET.

A closed-form model for thermionic trap-assisted tunneling (TTT) is presented. Findings reveal that the proposed model successfully reduces the computation time and also provides physical insight by revealing the peak, location and spread of emitted electrons.

Different techniques are used in compensating the effects of oxide fixed charge so as to design superjunction device having the minimum specific on-resistance for a given breakdown voltage. The contributions of oxide fixed charges and doping-related charge imbalance to breakdown reduction are analyzed for highlighting the significance of oxide fixed charges.

The importance of edge effects in modeling of the gate current in high-electron mobility transistors (HEMTs) is discussed. Findings reveal that the rise in gate current for a gate voltage beyond the threshold is a result of tunneling from the gate edges.

The article describes closed-form models of spreading resistance geometries, which is present in electrical/thermal design of devices and integrated circuits.

This paper presents the contents of a lecture for enhancing the interest of electrical engineering students in semiconductor device modeling and providing a deep appreciation of the conflicting requirements for an ideal model, of the sequence and interconnectivity of steps in the modeling procedure, and of the types of models existing in modern times. The lecture can be included in courses on semiconductor devices or device modeling. The lecture uses a resistor with 3-D effects and much simpler physics than a p-n junction for illustration, and coins mnemonics for key aspects. Objective assessment data confirm the need and efficacy of the proposed lecture. The work of this paper shows how proper introduction of a topic with carefully chosen illustrations and mnemonics can improve the teaching/learning process and how such improvements can be assessed. Index Terms--Analytical modeling, compact modeling, device modeling, numerical modeling, semiconductor devices, spreading resistance.

The channel-field distribution under the field plate in a high-electron mobility transistor (HEMT) in the OFF-state is modeled in terms of drain-voltage and physical parameters. This model fits into two-dimensional simulation results and allows estimation of the minimum drain-gate separation, the electric- field reduction, the breakdown-voltage improvement, and critical field for the onset of a parasitic phenomenon in a HEMT with a field plate.

We study the resistivity, ρcN, of end-bonded contacts to semiconductor NanoWires (NWs) of radius R = 5-10 nm over doping Nd = 1018-1020 cm-3. The study is important for NW device design and characterization. It reports realistic calculations of ρcN and highlights and explains how ρcN differs significantly from the resistivity ρcB of bulk contacts. First, the space-charge width in NW contacts is increased by the surrounding field which depends on R, contact geometry, and ambient dielectric; this width also depends on surface charge and dielectric confinement which reduces dopant ionization. Second, thin NWs have a low effective lifetime, τN, due to surface recombination. Third, NW contacts have a lesser image force barrier lowering due to the higher space-charge width. Due to these factors, apart from tunneling (which decides ρcB), space-charge region generation-recombination current also affects ρcN. As Nd is raised from 1018 to 1020 cm-3, ρcB falls rapidly, but ρcN varies slowly and may even increase up to 3-5 × 1018 and then falls rapidly. Further, ρcN/ρcB can be ≪1 at Nd = 1 × 1018 cm-3, reaches a peak ≫1 around Nd = 1 × 1019 cm-3, and → 1 at Nd = 1 × 1020 cm-3, e.g., for 0.8 V contact barrier on 10 nm thick n-type silicon NWs with τN = 1 ps embedded in SiO2, at T = 300 K, even a 10 nm contact extension yields a peak of 75 at Nd = 8 × 1018 cm-3. We study changes in ρcN/ρcB versus Nd behavior with R, contact geometry, ambient dielectric, surface charge, τN, T, tunneling mass, and barrier height. [ABSTRACT FROM AUTHOR]

Recently, we developed an Effective Medium Theory (EMT) for the Space-Charge Region electrostatics of Schottky and p-n junctions in arrays of nanofilms (NFs), nanowires, and nanotubes in a dielectric ambient and gave formulas for their junction depletion width and screening length characterizing the space-charge tail. In the present work, we develop this EMT further and derive simple formulas for the potential and field distributions in the semiconductor and dielectric media of the array. The formulas derived are validated with numerical simulations. It is shown that the potential and field distributions perpendicular to the junction plane in the array correspond to those in a bulk junction with an effective semiconductor medium, whose permittivity and doping are their weighted averages over the cross-sectional areas of the semiconductor and dielectric; the shapes of the cross-sections are immaterial. We also analyze a single NF junction, treating it as a limiting case of an array, and obtain the following key results. For negligible film thickness, the depletion width depends linearly on applied voltage and inverse of doping; the peak electric field depends linearly on doping and inverse of ambient permittivity and varies very gradually with applied voltage. These features of a thin film junction are remarkably different from the bulk junction, wherein the depletion width and peak field have a square-root dependence on applied voltage. [ABSTRACT FROM AUTHOR]

The analytical approach for the designing of the field plate geometry in a general heterostructure field-effect transistor (HFET) structure is discussed. The design helps in achieving the lowest electric field either along the two-dimensional electron gas (2-DEG) channel or along the surface with minimum enhancement of the gate capacitance.

Breakdown enhancement potential of the field plate (FP) technique is investigated, in a context of AlGaN/GaN power high electron mobility transistors (HEMT). Higher breakdown enhancement is possible using a higher insulator dialectric constant. The methodology used here can be extended to other FP structures in other lateral field-effect transistors (FET).

2-D electron gas (EG) in delta-doped and uniformly doped high-electron-mobility transistors is discussed. A simple, but comprehensive, model for 2-DEG concentration vs gate voltage behavior has been developed. The equilibrium 2-DEG concentration in an HEMT is also dealt with. The model is valid for delta-doped and uniformly doped HEMTs and captures the nonlinearities and the effects of all the device parameters, including temperature.

A grossly asymmetric junction is important in building modern semiconductor devices. Such Modulation Doped Heterojunctions (MODHJ's) are widely used in MODFET's. A unified approach to derive simple expressions for important equilibrium parameters of MODHJ's and Grossly Asymmetric Homojunctions (GAHMJ's) is described. The approach involves the width XH of the partially depleted H-side space-charge layer, areal concentration of nso of carriers and the possible drop PhiH over the width.

The complex high electron mobility transistor (HEMT) can be considered as a simple buried-channel (BC) metal oxide semiconductor field effect transistor (MOSFET). This is from the point of view of the behavior of the charge and location of the two-dimensional electron gas as a function of gate-source and drain-source voltages. Therefore, the characteristics of a HEMT, namely channel charge and capacitance/transconductance as a function of gate voltage below and above threshold are similar to those of a BC MOSFET.

We develop an Effective Medium Theory for the electrostatics of the Space-Charge Region (SCR) of Schottky and p-n junctions in arrays of nanofilms (NFs), nanowires (NWs), and nanotubes (NTs) in a dielectric ambient. The theory captures the effects of electric fields in both the semiconductor, i.e., NF/NW/NT, and the dielectric media of the array. It shows that the depletion width and the screening length characterizing the SCR tail in the array correspond to those in a bulk junction with an effective semiconductor medium, whose permittivity and doping are their weighted averages over the cross-sectional areas of the semiconductor and dielectric; the shapes of the cross-sections are immaterial. Further, the reverse bias 1/C2-V behavior of junctions in NF/NW/NT arrays is linear, as in bulk junctions, and is useful to extract from measurements the built-in potential, effective doping including the semiconductor-dielectric interface charge, and NF/NW/NT length. The theory is validated with numerical simulations, is useful for the experimentalist, and yields simple formulas for nano-device design which predict the following. In the limiting case of a single sheet-like NF, the junction depletion width variation with potential drop is linear rather than square-root (as in a bulk junction). In arrays of symmetric silicon p-n junctions in oxide dielectric where NF/NW thickness and separation are 5% and 100% of the bulk depletion width, respectively, the junction depletion width and the screening length are scaled up from their bulk values by the same factor of ~2 for NF and ~10 for NW array. [ABSTRACT FROM AUTHOR]

There is growing interest in fabricating conventional semiconductor devices in a nanofilm which could be a 3D material with one reduced dimension (e.g., silicon-on-insulator (SOI) film), or single/multiple layers of a 2D material (e.g., MoS2), or a two dimensional electron gas/two dimensional hole gas (2DEG/2DHG) layer. Lateral p-n junctions are essential parts of these devices. The space-charge region electrostatics in these nanofilm junctions is strongly affected by the surrounding field, unlike in bulk junctions. Current device physics of nanofilms lacks a simple analytical theory of this 2D electrostatics of lateral p-n junctions. We present such a theory taking into account the film's thickness, permittivity, doping, interface charge, and possibly different ambient permittivities on film's either side. In analogy to the textbook theory of the 1D electrostatics of bulk p-n junctions, our theory yields simple formulas for the depletion width, the extent of space-charge tails beyond this width, and the screening length associated with the space-charge layer in nanofilm junctions; these formulas agree with numerical simulations and measurements. Our theory introduces an electrostatic thickness index to classify nanofilms into sheets, bulk and intermediate sized. [ABSTRACT FROM AUTHOR]

We derive simple closed-form solutions for the optimum pillar parameters—length Lopt, width 2Wopt and doping Nopt of a superjunction. The parameters yield the minimum specific on-resistance, RONSP, for a target breakdown voltage, VBR,target, thereby solving a long standing design problem. The minimum RONSP occurs for zero charge imbalance. Our estimates of Nopt are higher and hence the RONSP lower than in prior works by >30%. We show that, Nopt depends on Wopt alone, since for this doping, the p and n pillars are just fully depleted when the reverse bias equals the VBR of the one-dimensional p+n junction. Further, our derivation reveals that Lopt depends on VBR,target alone since the field distribution associated with VBR,target is approximately uniform over Lopt. In contrast, prior design solutions require numerical or iterative calculations, and are either physically opaque or give a distorted insight that Lopt depends on Wopt and Nopt on Lopt. Moreover, our solutions have a generic form that permits quick calculations across different materials. They are validated by technology computer-aided design simulation for low and wide band gap materials—Si and 4H-SiC. Their results for GaN and diamond are given to reveal the wide 100 V–30 kV application range of devices in these materials. The solutions are also used to reveal the scope for reducing the RONSP of several fabricated devices reported in literature by process improvement. [ABSTRACT FROM AUTHOR]

The ON-state I – V characteristics of gallium nitride (GaN) high-electron-mobility transistors (HEMTs) are affected by the bias dependencies of four parameters, namely—virtual gate length, mobility, saturation velocity, and the channel-length modulation (CLM) parameter—this is in addition to the source/drain resistance, CLM, and self-heating which affect all FETs. The existing modeling approach involves developing an equation that includes all the above effects and then extracting all the equation parameters from measured I – V data. In this approach, at times, some effects need to be neglected in the quest for simplicity, and the values of some extracted parameters influence each other. To mitigate this problem, we propose a flipped modeling approach. Here, first, discrete data regarding the above four bias dependencies is extracted from the measured I – V curves using a universal FET model (UFM) which captures effects common to all the FETs. Next, the extracted data of each bias dependence is fitted using a simple equation with qualitatively correct behavior; these curve-fit equations are augmented to the UFM to complete the model. The CLM and saturation velocity data are extracted from the remnants of calibrated 2-D numerical simulations after turning off the virtual gate and self-heating effects. The parameter values of different devices and models are compared. [ABSTRACT FROM AUTHOR]

We present a TCAD (Technology Computer Aided Design) compatible multiscale model of phonon-assisted band-to-band tunneling in semiconductors, which incorporates the non-parabolic nature of complex bands within the bandgap of the material. This model is shown capture the measured current-voltage data in silicon, for current transport along the [100], [110], and [111] directions. Our model will be useful to predict band-to-band tunneling phenomena to quantify on and off currents in tunnel FETs and in small geometry MOSFETs and FINFETs. [ABSTRACT FROM AUTHOR]

We propose two models of electron tunneling from metal to a semiconductor via traps. In addition to the electrons below the metal Fermi level, the models also include the thermally activated electrons above the Fermi level. The first model is called generalized thermionic trap-assisted tunneling (GTTT), which considers tunneling through both triangular and trapezoidal barriers present in metal insulator semiconductor (MIS) structures. The second model is called thermionic trap-assisted tunneling (TTT), which considers tunneling through triangular barriers present in modern Schottky junctions. The GTTT model is shown to predict the low field leakage currents in MIS structures with nitrided oxide as insulator, and the TTT model is shown to predict the reverse gate leakage in AlGaN/GaN high electron mobility transistors. [ABSTRACT FROM AUTHOR]

The thermionic trap-assisted tunneling model is used for explaining the gate leakage inAlGaN/GaN HEMTs grown on silicon substrates, having aluminum compositions of 24%, 26% and 31%, AlGaN thickness of 20 nm, and drain-source bias of 10 V, over the gate-source voltages above threshold.

The enhanced conduction at low fields in metal-insulator semiconductor structures having nitrides oxides is described by using a generalized thermionic trap-assisted tunneling model. This model can predict both high and low field leakage currents by assuming that a fraction of the insulator thickness located next to the metal-insulator junction is devoid of traps.

Trap-assisted tunneling models, which include thermally activated electrons, are proposed and their applications are discussed. The generalized thermionic trap-assisted tunneling (GTTT) and thermionic trap-assisted tunneling (TTT) are analyzed and the GTTT model is shown to predict the low field leakage currents in the metal insulator semiconductors (MIS) structures with nitrided oxide as insulator and the TTT model is shown to predict the reverse gate leakage in AlGaN/GaN high electron mobility transistors.