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Your search keyword '"Kedika, Narender Reddy"' showing total 9 results
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9 results on '"Kedika, Narender Reddy"'

1. Fractional Order High Pass Filter Based Extremum Seeking Control for Grid Connected PV System

Author

Bhukya, Laxman, Kedika, Narender Reddy, Motamarri, Rambabu, Salkuti, Surender Reddy, Punna, Srinivas, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Li, Yong, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Oneto, Luca, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zamboni, Walter, Series Editor, Zhang, Junjie James, Series Editor, Salkuti, Surender Reddy, editor, Ray, Papia, editor, and Singh, Arvind R., editor

Published
2023
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2. Enhanced Predictive Torque Control of Open Winding Permanent Magnet Synchronous Motor Drive with Common Mode Voltage Elimination

Author

Meesala, Ravi Eswar Kodumur, Athikkal, Sivaprasad, Ramanjaneya Reddy, U., Kedika, Narender Reddy, Angrisani, Leopoldo, Series Editor, Arteaga, Marco, Series Editor, Panigrahi, Bijaya Ketan, Series Editor, Chakraborty, Samarjit, Series Editor, Chen, Jiming, Series Editor, Chen, Shanben, Series Editor, Chen, Tan Kay, Series Editor, Dillmann, Rüdiger, Series Editor, Duan, Haibin, Series Editor, Ferrari, Gianluigi, Series Editor, Ferre, Manuel, Series Editor, Hirche, Sandra, Series Editor, Jabbari, Faryar, Series Editor, Jia, Limin, Series Editor, Kacprzyk, Janusz, Series Editor, Khamis, Alaa, Series Editor, Kroeger, Torsten, Series Editor, Li, Yong, Series Editor, Liang, Qilian, Series Editor, Martín, Ferran, Series Editor, Ming, Tan Cher, Series Editor, Minker, Wolfgang, Series Editor, Misra, Pradeep, Series Editor, Möller, Sebastian, Series Editor, Mukhopadhyay, Subhas, Series Editor, Ning, Cun-Zheng, Series Editor, Nishida, Toyoaki, Series Editor, Oneto, Luca, Series Editor, Pascucci, Federica, Series Editor, Qin, Yong, Series Editor, Seng, Gan Woon, Series Editor, Speidel, Joachim, Series Editor, Veiga, Germano, Series Editor, Wu, Haitao, Series Editor, Zamboni, Walter, Series Editor, Zhang, Junjie James, Series Editor, Kumar, Jitendra, editor, Tripathy, Manoj, editor, and Jena, Premalata, editor

Published
2023
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3. Floating-capacitor based inverter for open-ended winding induction motor drive with fault-tolerance.

Author

Kedika, Narender Reddy and Pradabane, Srinivasan

Subjects
*INDUCTION motors, *PULSE width modulation, *IDEAL sources (Electric circuits), *VOLTAGE
Abstract

Floating-capacitor-based nine-level inverter topology for open-ended winding induction motor (OWIM) drive is presented in this paper. The proposed multilevel inverter topology (PMLIT) essentially consists of four three-phase two-level voltage source inverters (VSI), three isolated DC sources and a floating-capacitor (FC). Out of four inverters, three inverters are fed from DC sources, and the fourth inverter is connected with the FC. The advantage of the PMLIT is that the maximum output voltage will be twice the source voltage with nine levels across each phase winding. The PMLIT employs least number of components which makes the inverter cost-effective and has lowered control complexity. The PMLIT can deliver seven, five or three-level output voltage with a decrease in modulation index. Conventional sinusoidal pulse-width modulation (PWM) techniques can be employed to generate switch-gate pulses. The intermediate-voltage levels are realised by proper charging and discharging of the FC. The performance of the PMLIT under possible switch faults is investigated, and modified switching logics are proposed to deliver a balanced supply for the OWIM drive in post-fault operation. Simulations are performed in the MATLAB/Simulink environment, and an experimental setup is designed to validate the simulations, and the results are presented. [ABSTRACT FROM AUTHOR]

Published
2023
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9. Fault‐tolerant multi‐level inverter topologies for open‐end winding induction motor drive.

Author

Kedika, Narender Reddy and Pradabane, Srinivasan

Subjects
*INDUCTION machinery, *INDUCTION motors, *PULSE width modulation, *ELECTRIC inverters, *RENEWABLE energy sources, *TOPOLOGY, *IDEAL sources (Electric circuits)
Abstract

Summary: This paper presents two nine‐level inverter topologies for open‐end winding induction motor drive with fault‐tolerance for all possible switch faults. The proposed topologies are designed with three voltage‐source inverters each with eight switches, an isolated DC source and a capacitor. The number of components and the scheme of connection employed for phase windings in both the topologies are identical. The voltage across the capacitors is controlled using the phase currents and hence does not require any additional pre‐charging circuit. The direction of phase currents flowing through the capacitors determines their charging and discharging states. Hence the proposed topologies are categorized as flying‐capacitor leg based topology (FCLBT) and switched‐capacitor based topology (SCBT) considering the technique employed for generating intermittent voltages. Although these topologies require three sources, the output voltage peak across each phase winding would be twice the source voltage, hence lower rating renewable energy sources can be employed as input sources. Conventional level‐shifted carrier sinusoidal pulse width modulation technique (SPWM) is employed for generating switching pulses. The proposed topologies employ reduced number of devices compared to existing similar nine‐level topologies and also exhibit fault‐tolerance for switch faults. The post‐fault operation of the proposed topologies does not require any additional hardware but necessitates the modifications of switching pulses. Simulations are performed in the MATLAB/Simulink environment and results are presented. A prototype is constructed to validate the performance of the proposed topologies and experimental results are presented. [ABSTRACT FROM AUTHOR]

Published
2021
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