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We report on the use of InGaAsP strain-compensated superlattices (SC-SLs) as a technique to reduce the defect density of Indium Phosphide (InP) grown on silicon (InP-on-Si) by Metal Organic Chemical Vapor Deposition (MOCVD). Initially, a 2 μm thick gallium arsenide (GaAs) layer was grown with very high uniformity on exact oriented (001) 300 mm Si wafers; which had been patterned in 90 nm V-grooved trenches separated by silicon dioxide (SiO₂) stripes and oriented along the [110] direction. Undercut at the Si/SiO₂ interface was used to reduce the propagation of defects into the III-V layers. Following wafer dicing; 2.6 μm of indium phosphide (InP) was grown on such GaAs-on-Si templates. InGaAsP SC-SLs and thermal annealing were used to achieve a high-quality and smooth InP pseudo-substrate with a reduced defect density. Both the GaAs-on-Si and the subsequently grown InP layers were characterized using a variety of techniques including X-ray diffraction (XRD); atomic force microscopy (AFM); transmission electron microscopy (TEM); and electron channeling contrast imaging (ECCI); which indicate high-quality of the epitaxial films. The threading dislocation density and RMS surface roughness of the final InP layer were 5 × 10⁸/cm² and 1.2 nm; respectively and 7.8 × 10⁷/cm² and 10.8 nm for the GaAs-on-Si layer.

In this work, reconfigurable metafilm absorbers based on indium silicon oxide (ISO) were investigated. The metafilm absorbers consist of nanoscale metallic resonator arrays on metal-insulator-metal (MIM) multilayer structures. The ISO was used as an active tunable layer embedded in the MIM cavities. The tunable metafilm absorbers with ISO were then fabricated and characterized. A maximum change in the reflectance of 57% and up to 620 nm shift in the resonance wavelength were measured.

In this paper, we present a coherent receiver based on an optical phase-locked loop (PLL) for linear phase demodulation. The receiver concept is demonstrated at low frequency. For high-frequency operation, monolithic and hybrid integrated versions of the receiver have been developed and experimentally verified in an analog link. The receiver has a bandwidth of 1.45 GHz. At 300 MHz, a spurious free dynamic range (SFDR) of 125 dB . Hz(2/3) is measured.

Template-assisted selective area growth techniques have gained popularity for their ability to grow epitaxial materials in prefabricated dielectric templates. Confined epitaxial lateral overgrowth (CELO) is one such technique that uses dielectric templates to define the geometry of the grown nanostructures. Two terminal low-temperature magneto-transport measurements were used to determine electronic properties. For doped In0.53Ga0.47As CELO nanostructures, we observe Shubnikov–De Hass oscillations in the longitudinal magnetoresistance and utilize these to estimate effective mass, carrier density, and mobilities. This analysis both reveals the presence of defects in these nanostructures and material variabilities between growth runs. Electron beam lithography and contact deposition for transport measurements were enabled by parasitic growth removal. In the future, this approach can enable other material systems to be explored for confined lateral epitaxy, improve material quality, and investigate a variety of quantum transport phenomenon in such nanoscale devices. [ABSTRACT FROM AUTHOR]

Heteroepitaxy of indium phosphide (InP) and its lattice-matched alloys on silicon (Si) show great promise for Si-based optoelectronic devices and photonic integrated circuits. Here, we report the monolithic growth of high crystalline quality InP on V-groove patterned (001) Si substrates by metalorganic chemical vapor deposition, demonstrating a low surface defect density of 4.5 × 107 cm−2, characterized by statistical electron channel contrast imaging. This advanced InP-on-Si virtual substrate is implemented by combining a compositionally graded indium gallium arsenide (InxGa1−xAs) buffer and optimized In0.73Ga0.27As/InP strained-layer superlattices on gallium arsenide on a V-grooved Si template. These techniques gradually accommodate the lattice mismatch and effectively filter most of the generated dislocations. A comprehensive material characterization and the demonstration of room-temperature continuous-wave electrically pumped laser diodes on Si validate the suitability of using this InP-on-Si platform for monolithic integration of InP- and Si-based electronic and photonic devices. [ABSTRACT FROM AUTHOR]

Selectively growing epitaxial material in confined dielectric structures has been explored recently as a pathway to integrate highly mismatched materials on silicon substrates. This approach involves the fabrication of a channel-like structure of dielectric material that from the growth atmosphere reaches down to a small exposed area of the substrate where subsequent growth via metal organic chemical vapor deposition (MOCVD) initiates. The technique, referred to as template assisted selective epitaxy, can also enable the development of novel nanoscale photonic and electronic device structures because of its ability to allow epitaxy to progress in a direction, final size, and aspect ratio defined by the dielectric template, and allows integration of horizontal heterojunction inside the channel. To date, most confined epitaxy work has been detailed on silicon. Due to the reduced chemical and thermal stability of InP compared to Si, additional steps for surface preparation are required. In this work, two different fabrication routes are described on InP substrates: one involving amorphous silicon as a sacrificial layer and deposited SiO2 as top oxide, while the other involves spin coated photoresist and hydrogen-silsesquioxane sourced SiOx. Both routes, leading to similar template structures, are demonstrated and discussed. Homoepitaxy of InP in both types of templates and the integration of an InAs horizontal heterojunction are demonstrated via MOCVD. An increase in growth rate with decreasing template length, increasing template width, and decreasing pattern density is observed. [ABSTRACT FROM AUTHOR]

We present an extensive study of an ultracompact grating-based beam splitter suitable for photonic integrated circuits (PICs) that have stringent density requirements. The 10 [micro]m long beam splitter exhibits equal splitting, low insertion loss, and also provides a high extinction ratio in an integrated coherent balanced receiver. We further present the design strategies for avoiding mode distortion in the beam splitter and discuss optimization of the widths of the detectors to improve insertion loss and extinction ratio of the coherent receiver circuit. In our study, we show that the grating-based beam splitter is a competitive technology having low fabrication complexity for ultracompact PICs. OCIS codes: 230.1360, 130.3120.

The fabrication and testing of unitraveling-carrier photodiodes (UTC-PDs) with different absorber and collector layer doping profiles is discussed. Lower and more graded absorber doping and higher collector doping is observed in PD B.