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from Richard W. Hamming collection (NPS-018), Naval Postgraduate School. Papers and Speeches. This study assesses the impact of Large Scale Integration on future airborne digital systems, with a focus on the VSTOL systems. The study addresses the design, implementation, testing, servicing and the associated life cycle costs of airborne digital computer systems, both the hardware and the programs necessary for successful operation of the system. The scope of the study is limited to the computer system, not the sensors, keyboards, displays and other peripheral equipment. The study provides: information for decision making on the future course of action, a design philosophy, a process analysis methodology, and a life cycle cost analysis method. supported in part by the Naval Weapons Center under the project number 77 WR30155 http://archive.org/details/studyofalternati00kodr Approved for public release; distribution is unlimited.

Task allocation is an important component of the process of mapping modules of application programs to multicomputers. A scheme for static allocation of periodic tasks with precedences to processors is developed considering task execution times, communication costs, and utilization level of each processor. It has the main goal of minimizing the application response time with a minimum number of processors. A network of transputers is employed as a platform to experimentally evaluate the allocation approach constructed with this work. An existing communication layer in the language ADA is improved to provide an efficient support for task flow simulations on transputer networks. The first phase of the allocation scheme is a constructive assignment heuristic that allocates the cluster of tasks composed of all tasks in the critical path in the same processor. The remaining tasks are allocated according to a heuristic function that considers task precedences, task execution times, and relative sizes of intertask messages. The initial allocation is improved in the second phase by using an iterative pairwise interchange of tasks that considers interprocessor communication distances. The overall scheme of task allocation was successfully tested and analyzed through simulation of several applications on a transputer network providing a near optimal solution. http://archive.org/details/allocationofperi1094523524 Lieutenant Commander, Brazilian Navy Approved for public release; distribution is unlimited.

This research specifies and validates a new concurrent decomposition scheme, called Confined Space Search Decomposition (CSSD), to exploit parallelism of Radar Data Processing algorithms using a Distributed Computational System. To formalize the specification we propose and apply an object-oriented methodology called Decomposition Cost Evaluation Model (DCEM). To reduce the penalties of load imbalance we propose a distributed dynamic load balance heuristic called Object Reincarnation (OR). To validate the research we first compare our decomposition with an identified alternative using the proposed DCEM model and then develop a theoretical prediction of selected parameters. We also develop a simulation to check the Object Reincarnation concept. http://archive.org/details/radardatprocessi1094524022 Commander, Brazilian Navy Approved for public release; distribution is unlimited.

As computing machines advance, new fields are explored and old ones are expanded. This thesis considers parallel solutions to several well-known problems from numerical linear algebra, including Gauss Factorization and the method of Conjugate Gradients. The Gauss algorithm was implemented on two parallel machines: an Intel iPSC/2, and a network of INMOST-800 transputers. Interprocessor communication-in both cases-was borne by a hypercube interconnection topology. The results reveal general findings from parallel computing and more specific data and information concerning the systems and algorithms that were employed. Communication is timed and the results are analyzed, showing typical features of a message passing system. System performance is illustrated by results from the Gauss codes. The use of two different pivoting strategies shows the potential and the limitations of a parallel machine. The iPSC/2 and transputer systems both show excellent parallel performance when solving large, dense, unstructured systems. Differences, advantages, and disadvantages of these two systems are examined and expectations for current and future machines are discussed http://archive.org/details/hypercubesolutio1094526581 Approved for public release; distribution is unlimited.

This thesis presents the design, implementation and description of a Data_Logger for the Suitcase Navigation System. All the programs and examples presented in this thesis were implemented in the Ada programming language, which has sucessfully incorported the low_level I/O ports communication with high_level abstraction. The software is portable as desired and can be reused by LCCDS when needed. http://archive.org/details/thenavigationdat1094528391 Commander, R.O.C. (Taiwan) Navy Approved for public release; distribution is unlimited.

http://archive.org/details/simulationofpara1094528538 NA NA

This thesis explores the feasibility of developing a tactical display simulator on the H/z-100 microcomputer. A prototype simulator is implemented in ZBASIC, some graphics functions routines are implemented in Macro-86, and timing and performance measurements are performed for comparison. Listings of the programs developed are presented as well as instructions for the effective use. Directions for the modification of the code, and suggested profitable areas of exploration and further development are included. It is concluded that a tactical display simulator is feasible, and that the final implementation should be in Marco-86. http://archive.org/details/tacticaldisplays1094522141 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

A program for control system modeling, simulation and realization useable by the novice programmer was developed for interactive use on a microcomputer. The program uses two software packages; PL/1-80 from Digital Research and DBASE II from Ashton Tate. The paper covers a complete example for modeling and simulation of a minimum time response ripple free controller for a 1/S(2) plant. The program uses two sample rates, one for modeling the computer and the other for modeling the plant. Variable delays due to computer computation are included and corrected semi-transparent to the control designer. .This thesis covers two different fields of interest, one for the experienced control system designer yet a novice programmer, and the other for the novice control designer yet an experienced computer programmer. Key programming concepts include using a business database to automatically program a control problem requiring a scientific language. http://archive.org/details/interactivemicro1094520220 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

This thesis describes the design and implementation of a distributed processing network of IBM PC compatible computers capable of performing parallel processing tasks. The network is a star cluster local area network, with the central computer controlling the operations of the satellite computers on a sequential basis. The local area network software operates over the computer's standard RS-232C communications ports, and is currently implemented to allow the central computer to operate two satellite computers. Processing tasks are dispatched to the satellite computers as programs which run to completion on the satellite computers. Utility programs within the software include file and message transfer to start the programs on the satellite computers and to obtain the output of the remotely executed program, configuration utilities to set the communications port parameters, and windowing utilities for display of information normally presented on the remote computer's display. The program is implemented in Turbo Pascal 4.0 under the MS-DOS operating system, version 3.21. http://archive.org/details/turbopascalimple1094527317 Approved for public release; distribution is unlimited.

This thesis presents the evaluation of work distribution algorithms and hardware topologies in a multi-Transputer network. The primary emphasis concerns a work distribution algorithm known as 'workfarm' that is effective on problems that are divisible into independent work packets. All the programs and examples presented in this thesis were implemented in the OCCAM programming language, using the Transputer Development System, D700C, Beta 2.0 March 1987 compiler version. Keywords: Optimization, Debugging. (kr) http://archive.org/details/evaluationofwork1094523030 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

Distributed decision problems arise when two or more sensors viewing the same phenomenon must work cooperatively to draw inferences about the observed situation. Typical examples are in target detection and target classification. Such problems are characterized by distributed processing of information and communication between processors over a limited bandwidth data link. This thesis presents some statistical distributed decision algorithms and describes the implementation of one of them on a set of loosely coupled multiprocessor clusters which simulate the distributed environment characterizing multisensor decision problems. The purpose of the implementation was to investigate problems of communication and process synchronization in a pair of processor clusters performing a statistical distributed decision algorithm. This thesis describes how these communication and synchronization problems were addressed and solved. http://archive.org/details/developmentoftes1094521274

The historical facts that brought todays scientists to use optical communication systems, and the possible advantages or disadvanteges of using fiber optic transmission medium were investigated. The requeriments and characteristics of the optical links and the problems related to their implementation were studied. Today's applications as well as the future ones, are discussed. An economic analysis and an effectiveness analysis was carried out to stablish future trends. http://archive.org/details/surveyofcurrentt1094518305 Lieutenant Commander, Spanish Navy Approved for public release; distribution is unlimited.

Magnetic bubble memory is a new digital storage technology that offers many significant advantages over currently existing secondary storage media. Bubble memories, with high densities and relatively fast access times, are non-volatile semiconductor devices that provide a high degree of reliability in harsh environments. This technology has the potential for a vital and unique role in both the civilian and military computing environments due to the combination of characteristics exhibited by magnetic domain devices. This thesis presents an implementation of a magnetic bubble device utilizing a conventional operating system. Digital Research's CP/M-86, and a standard commercial 16-bir microcomputer, the Intel iSBC 86/12A. A fully operational system capable of testing, evaluating and utilizing a magnetic bubble device in a standard user environment is presented. http://archive.org/details/adaptationofmagn1094520407 Captain, United States Marine Corps Captain, United States Marine Corps Approved for public release; distribution is unlimited.

http://archive.org/details/aninvestigationo1094517093 Lieutenant Commander, Federal German Navy Approved for public release; distribution is unlimited.

This thesis investigates the feasibility of software safety analysis using Petri net modeling and an automated suite of Petri Net UTilities (P-NUT) developed at UC Irvine. We briefly introduce software safety concepts, Petri nets, reachability theory, and the use of P-NUT. We then develop a methodology to combine these ideas for efficient and effective preliminary safety analysis of a real-time, embedded software, military system. http://archive.org/details/petrinetmodeling1094523349 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

http://archive.org/details/dynamicreconfigu1094525859 NA

Because of the need for having efficient scheduling algorithms in large scale real-time systems, software engineers put a lot of effort on developing scheduling algorithms with high performance. But neither algorithm developed upto now is perfect for all cases. At this stage, instead of having one scheduling algorithm in the system, more than one different algorithms which will try to find a feasible solution to the scheduling problem according to the initial properties of the tasks would be very useful to reach a high performance scheduling for the system. This report represents the effort to provide static schedulers for the Embedded Real- Time Systems with single processor using the Ada programming language. The independent nonpreemptable algorithms used in these static schedulers are run according to the timing constraints and precedence relationships of the critical operators extracted from a high level source program. The final schedule guarantees that timing constraints for the critical jobs are met. The primary goal of this report is to support the Computer Aided Rapid Prototyping for Embedded Real-Time Systems so that we will determine whether the system, as designed, will meet the required timing specifications. Secondary goal is to demonstrate the significance of Ada as the implementation language. http://archive.org/details/staticschedulers1094526266 Lieutenant J. G., Turkish Navy Approved for public release; distribution is unlimited.

CP-M-86 is a microcomputer (INTEL 8086) operating system enveloped and marketed by Digital Research. The operating system is designed so that a user can adapt the system to his own input/output hardware devices. This thesis develops interfaces to two floppy disk controllers, the 1SBC 201 (single density) and the 1IBC 202 (double density) controllers. The interface includes the writing of a boot loader embedded in the 1SBC 957 Execution Vehicle Monitor, the monitor system for the INTEL 1SBC 56/12 single board computer. Also included is an interface module for the cold start loader (loader BIOS) and an input and output interface, BIOS. A design for the interface module of typical systems based on Winchester technology hard disks is also presented. http://archive.org/details/alterationofcpmo1094520412 Lieutenant Commander, United States Navy Approved for public release; distribution is unlimited.

This thesis describes the detailed design and implementation of a printer server in the laboratory environment of sharing resources among multiple Zenith Z-100 microcomputers. The Printer Server System is a controller box which consists of a power supply, a single board computer, and the BLC 8538 eight channel I/O expansion boards. Each Z-100 microcomputer is connected to the controller thru the RS-232C port. The Printer Server System has three software utilities: BOOT, CONTROL and SPOOL. The BOOT process, resident in the controller, downloads the CONTROL file from any one of multiple Z-100*s which is turned on. The CONTROL process allows the printer to be used by any one of multiple Z-lOO's at a time. The SPOOL process sends the data thru the CONTROL process to the printer or saves the data on the disk file. http://archive.org/details/printermultiplex1094521499 Captain, Korea Army Approved for public release; distribution is unlimited.

Microcomputer systems will influence future technical changes in a submarine. As a demonstration of the computational power of the microcomputer, an optimal controller for the pitch and depth of a submarine was developed using the INTEL 8080 microcomputer. A model simulating a submarine and the control algorithm were first written in a simulation language DSL/360. The control algorithm was then coded in the microcomputer language PLM and implemented on a microcomputer. Also included is an investigation of the feasibility to execute the PLM program in a given time frame, an analysis of the computational errors and the inherent errors in measurements from peripheral devices. http://archive.org/details/microcomputerbas1094517860 Lieutenant Commander, Federal German Navy Approved for public release; distribution is unlimited.

This thesis presents a design and implementation of a model of a multicluster loop interface. This Delay Insertion Loop type of interface is based on the IMS T424 Transputer and the Concurrent Sequential Processes type of programming language OCCAM. The Loop-type of communications systems are described and the Delay Insertion type of interface has been selected as the most appropriate one for high performance real-time applications. The OCCAM programming language, hosted on the VAX 11/780 VMS system (VAX-Virtual Address eXtension, VMS-Virtual Memory System), was used to program the simulated version of the multicluster loop interface. http://archive.org/details/implementationof1094521373 Lieutenant J.G., Turkish Navy Approved for public release; distribution is unlimited.

This thesis examines the features of the Ada language, describes the structure of the Hellenic Command Control and Information System (HCCIS) and investigates the use of Ada for the program development of HCCIS. The Ada high order programming language system is being procured to act as a standard for the implementation of future United States embedded computer systems. Many benefits are claimed from this approach for software engineering and management practice. HCCIS is a future system which will provide a network of automatic data processing support at Commands. http://archive.org/details/investigationofa1094520231 Commander, Hellenic Navy Approved for public release; distribution is unlimited.

http://archive.org/details/ashipboardreport1094517939 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

A microcomputer program to solve the complex task of air-borne navigation was developed to demonstrate the practicality of replacing costly general purpose digital computers with relatively inexpensive dedicated microcomputers on-board naval aircraft. The microcomputer program showed that microcomputers have sufficient speed and accuracy to solve the navigation problem. In order to overcome the microcomputer's major deficiencies, speed and accuracy, special arithmetic subprograms based on table look-up were developed to trade inexpensive memory for more speed. An application of graph theory in the form of process graphs was made to facilitate the development and documentation of the navigation program. To aid in the testing of the microcomputer program, a Fortran simulation program was developed to confirm the results of an error bound analysis of the navigation program. http://archive.org/details/designstudyofnvi1094516961 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

A computer procedure to solve interactively the daily flight scheduling problem for training squadrons is proposed. The scheduling problem for a prototype squadron, Fighter Squadron One Hundred Twenty-one, is mathematically analyzed using graph coloring techniques. A procedure similar to published class scheduling solutions which uses an assignment algorithm is formulated. A computer program is then developed to demonstrate the procedure. http://archive.org/details/acomputersolutio1094520790 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

This thesis proposes a Report Originating System to provide afloat and small commands with the capability of automatic data processing assistance in report generation. The discussed system is completely implementable in small, inexpensive general purpose microcomputer hardware. The principal benefit of the system lies in its ability to prompt the user to solicit the information required to be submitted in the report and to partially analyze the user's responses for correctness of form and content. Such computerized assistance should result in higher report quality and the concomitant reduction of correcting message traffic. The Report Originating System incorporates a line editing capability which lends itself to any text editing process. Thus, frequently modified locally prepared documents such as unit instructions and directives can be originated and updated with this system. http://archive.org/details/amicrocomputerba1094518200 Lieutenant Commander, United States Naval Reserve Approved for public release; distribution is unlimited.

This thesis develops a prototyping facility to support accurate exploratory modeling of the temporal structure of real time, concurrent software systems on a parallel processor architecture. The hierarchical bus parallel processor architecture, call the Real Time Cluster Star (RTC*), is the hardware on which an executive operating system, the Extended Multi-COmputer Real Time EXecutive (EMCORTEX), provides the capability for concurrent real time processing. The prototyping facility is a tool to aid the system designer to assess the tasking structure and the resulting temporal behavior of concurrent multiprocess systems. This facility allows an early modeling of a proposed real time system so that system's design flaws can be discovered and corrected before the system is fully developed. http://archive.org/details/asoftwaresystemi1094522110 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

This thesis extends the multi-computer real-time executive, MCOPTEX, for a cluster of single board computers (INTEL iSBC 36/12) on the MULTIBUS, to a multiple cluster system tied together by a Local Area Network (Ethernet). The E-MCORTEX system uses evertcounts and sequencers to synchronize processes resident in the network. Data communications between processes are presently limited to a single cluster with shared memory. However, future versions of E-MCORTEX will" permit network-wide process synchronization and data communication. http://archive.org/details/arealtimeexecuti1094519524 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

This thesis presents a software algorithm that resends work packages to processors when one or more of the worker processors fails or when the link with one or more processors fails. There are two resend criteria used in this algorithm: "resend at end of initial assignment" and "resend at time out". The work, divided into several packages in order to run on several processors in parallel, will be completed as long as at least one work processor remains working and communicating with the main processor. This algorithm could add some fault-tolerance to computer processing in embedded systems. http://archive.org/details/afaulttolerantso1094527051 Lieutenant, United States Navy Approved for public release; distribution is unlimited.

An airborne tactical system composed of three distributed microcomputers is described. An extrapolation technique using the method of orthogonal polynomials is presented to solve the ballistics problem. In order to test the performance of distributed microcomputers for real time military applications/ a simplified airborne tactical system, utilizing two microcomputers working in parallel, is implemented. The motivation for this research is the reduction of cost that would result from the use of microcomputers in such systems. http://archive.org/details/distributedmicro1094520824 Lieutenant Commander, Brazilian Navy Approved for public release; distribution is unlimited.

This thesis presents extensions to an implementation of a kernel in a real-time distributed operating system for a microcomputer based multi-processor system. The operating system, MCORTEX, is a 2 level, hierarchically structured, loop free, system that permits logical distribution of the kernel in the address space of each process. The design is based on segmented address spaces and per process stacks. Process synchronization is achieved through sequencers and eventcounts. MCORTEX is resident in the local memory of each microcomputer but system data is maintained in shared global memory. MCORTEX has been extended to include a system monitor process which allows stopping the system to examine any memory, shared or local, from any location. The system can then be restarted without reinitializing each microcomputer. This system particularly supports applications where jobs are partitioned into a set of multiple interacting asynchronous processes. The system is currently implemented on INTEL 86/12A single-board computers. http://archive.org/details/implementationof1094520203 Captain, United States Army Approved for public release; distribution is unlimited.

An abundance of Data Base Management Systems and Query Languages already exist, not to mention those which have been, and continue to be proposed. Most Data Base Management System surveys focus on the type of model used to represent the data, methods of access, protection, etc. This paper acquaints the EDP manager with the fundamental differences among the more significant query languages with emphasis on those characteristics which should be considered when choosing a query language. The term query language as used here has been expanded to include the entire user interface to the data base, and encompasses both data sublanguages and stand-alone query languages. http://archive.org/details/annalysisofdatba1094518007 Lieutenant Commander, United States Navy Lieutenant, United States Navy Approved for public release; distribution is unlimited.

This thesis presents the Design, Implementation and Evaluation of an Operating System for a Network of Transputers, with main focus on the Communication Subsystem. It also introduces the novice to the Transputer Development System (TDS) and suggests a sequence for developing applications. All the programs and examples in this thesis were implemented in the OCCAM1 Programming Language, and using the Transputer Development System (TDS-D600), running under the VAX/VNS Operating System at the Naval Postgraduate School (NPS). http://archive.org/details/designimplementa1094522732 Lieutenant, Brazilian Navy Approved for public release; distribution is unlimited.

This thesis presents the design, implementation, and evaluation of a virtual shared memory in a multi-Transputer network. The thesis explores the Transputer hardware implementation model and highlights the important details that programmers of such systems may need before being able to optimize such networks. All the programs and examples presented in this thesis were implemented in the OCCAM programming language, using the Transputer Development System, D700C, Beta 2.0 March 1987 compiler version. http://archive.org/details/designimplementa1094522733 Lieutenant Commander, Royal Australian Navy Approved for public release; distribution is unlimited.

Distinguished Alumni Award Program author. CMDR Gordon Eubanks, USN (Ret) (Presented 15 June 2012) The design and implementation of an extension to the BASIC programming language for use on a miroprocessor-based system has be described. The implementation is comprised of two Subsystems, a compiler which generates code for a hypothetical zero-address machine and a run-time monitor which interprets this code. The design goals solutions and recommendations for further expansion of the system have been presented. The system was implement in P L / M for use in a diskette-based environment. http://archive.org/details/amicroprocessori1094517862 Lieutenant, United States Navy

Currently the design of highly parallel supercomputers is one of the most challenging problems in engineering. The purpose of this thesis is to describe how the problem was approached in the design, implementation and building of a Torus Double Transitive Closure Network of Microprocessors, using the T414 Transputer as the basic Unit of Computation. Also compares the performance of the evolved model, from one Transputer to the final stage of sixteen Transputers running in parallel. All the programs and examples presented in this thesis were implemented in the OCCAM2 Programming Language, using the Transputer Development System, D700c, BETA 2.0 release March 1987 compiler version. http://archive.org/details/designimplementa1094523159 Lieutenant Commander, Venezuelan Navy Approved for public release; distribution is unlimited.

Naval Postgraduate School (U.S.) This thesis extends the multi-computer real-time executive, MCORTEX. The multiple cluster system RTC* (Real Time Cluster Star), consisting of clusters of single board computers (INTEL iSBC 86/12A), which are connected via an Ethernet Local Area Network, serves as a hardware basis for the implementation of extended MCORTEX. The extension upgrades MCORTEX to system-wide synchronization and general data communication between any processes in the system. An intercluster shared memory model is developed, that partially replicates intracluster shared memory, such that shared data replication is minimized and the system's processing speed is maximized. This implementation, by transmitting produced shared data to all consuming clusters as soon as possible after production, guarantees that only cluster local hits occur in the system. Shared memory space is used efficiently by transmitting shared data to consuming clusters only, and by the ability to store shared data contiguously in intracluster shared memory. http://archive.org/details/processsynchroni1094521503 Lieutenant Commander, Federal German Navy

An overview of plasma display technology and operation is presented. Advantages and disadvantages of plasma graphics are explored. Some applications that are particularly appropriate for a plasma display are listed. Hardware and software developed to interface the AN/UYQ-10 plasma display with an Intellec Microcomputer Development System are discussed. http://archive.org/details/amicrocomputerba1094518494 Lieutenant, United States Navy Captain, United States Marine Corps Approved for public release; distribution is unlimited.

This work is an analysis of the use of a multilevel secure computer system to execute tactical combat applications programs. Using the Gemini Trusted Multiple Microcomputer Base, currently under evaluation by the Department of Defense Computer Security Center, applications and test programs were written and implemented in order to expose some characteristics of the system. Using a Janus/Ada compiler with the necessary library alterations for the Gemini machine, a simple weapons application program was implemented in a system designed to simulate a tactical environment where classified material can be handled in spite of the different levels of security held by the operators that can access the system. The loss in performance due to the secure operating system's overhead is estimated in order to establish the tradeoffs in performance gains due to parallel processing capability of the multiprocessor system. http://archive.org/details/modellingofmulti1094521982 Lieutenant Commander, Brazilian Navy Approved for public release; distribution is unlimited.

This thesis reports on the design and implementation of a simulation of the Signal Processor Interface to the AN/SPY-1A Phased Array Radar Controller. Inherent to the simulation is the development of a representative time sensitive database of the targeting environment. The programming language Ada was utilized as a program development language in the design for the database. The developed Target Database utilizes the 20 mega-byte REMEX Data Warehouse 3200 memory storage unit. The simulation of the Signal Processor Interface will allow real time testing of the Naval Postgraduate School's AN/ SPY-1A Radar Controller System Model. http://archive.org/details/signalprocessori1094519983 Captain, United States Army Approved for public release; distribution is unlimited.

This thesis is a study of the Omega navigation system as currently implemented in the P-3C aircraft. The possibility of using a microcomputer to solve the internal processing functions is investigated. Data flow graphs were applied to the velocity and navigation processing function in the Omega system. These graphs assisted in the development of the PL/M code which implements the function. The four PL/M subroutines that were written can compute the velocity and navigation equations in sufficient time and with sufficient accuracy to encourage additional research into a microcomputer implementation of the remaining internal functions of the Omega system. http://archive.org/details/astudyofpcomegna1094518300 Captain, United States Marine Corps Approved for public release; distribution is unlimited.

This paper explores the general topic of data compression, with emphasis on application of the techniques to graphic bitmapped data. Run-length encoding, statistical encoding (including Huffman codes), and relative encoding are examined and evaluated. A compression application of the Huffman coding of a run-length encoded file is designed and partially implemented in Chapter VII. A listing of the computer program which performs the compression is included as an appendix. Possibilities for further study are suggested. http://archive.org/details/compressionofbit1094525761 Civilian Approved for public release; distribution is unlimited.

The weighted region least cost path problem involves finding the minimal cost path between a source point and a goal point through a plane that has been subdivided into weighted regions. In this thesis, we investigate a new parallel approach which seeks to take advantage of the distributed, asynchronous computing environment provided by the INMOS Transputer. The algorithm consists of a family of local, asynchronous, iterative and parallel procedures. The program is implemented on a network of transputers using a parallel version of the C programming language and tested on various maps of triangulated weighted regions. Results were favorable in terms of producing a near optimum path and reduced processing time. http://archive.org/details/solvingweightedr1094527274 Captain, United States Marine Corps Approved for public release; distribution is unlimited.

The purpose of this thesis was to carry out a single proposal for Korean computer industry and government. Furthermore, this thesis is a general proposal in terms of social and economic factors as well as technological factors. This thesis includes a general proposal for the near future (i.e., "software houses" activation, development of a single market, and the shortage of software technical personnel), a general proposal for the distant future (i.e., social policy, computer research and development center's establishment, and semiconductor company establishment) , and a general proposal for the Korean computer marketing field (i.e., consumer education, low cost/high performance strategies, diversification and differentiation strategies, and focal point strategy). A study of Korean computer companies and government is net completed, and can not be. Therefore, the author's recommendation s are described in the Chapter V. http://archive.org/details/aproposalforkore1094519514 Lieutenant Commander, Republic of Korea Navy Approved for public release; distribution is unlimited.