85 results on '"Krishnamurthy, Harish"'
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2. Simulation of a Screw Self-tapping Process
3. Simulation of a Screw Self-tapping Process
4. Water Intrusion in Automotive Door Latches Using SPH Method
5. Mini-LEGO: A 1.5-MHz 240-A 48-V-to-1-V CPU VRM with 8.4-mm Height for Vertical Power Delivery
6. Mini-LEGO CPU Voltage Regulator
7. A Digital LDO in 22nm CMOS with a 4b Self-Triggered Binary Search Windowed Flash ADC Featuring Analog Layout Generator Framework
8. Mini-LEGO CPU Voltage Regulator
9. A Monolithic 26A/mm2 Continuously-Scalable Conversion Ratio Switched-Capacitor Converter With Phase-Merging Turbo and Communication-Less Ganging
10. A Digital LDO in 22nm CMOS with a 4b Self-triggered Binary Search Windowed Flash ADC Featuring Automatic Analog Layout Generator Framework
11. EM SCA White-Box Analysis-Based Reduced Leakage Cell Design and Presilicon Evaluation
12. Fully Integrated Voltage Regulators with Package-Embedded Inductors for Heterogeneous 3D-TSV-Stacked System-in-Package with 22nm CMOS Active Silicon Interposer Featuring Self-Trimmed, Digitally Controlled ON-Time Discontinuous Conduction Mode (DCM) Operation
13. Vertical Stacked LEGO-PoL CPU Voltage Regulator
14. A 32-A, 5-V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN nMOS Power Transistors
15. Vertical Stacked 48V-1V LEGO-PoL CPU Voltage Regulator with 1A/mm2 Current Density
16. A 0.76V Vin Triode Region 4A Analog LDO with Distributed Gain Enhancement and Dynamic Load-Current Tracking in Intel 4 CMOS Featuring Active Feedforward Ripple Shaping and On-Chip Power Noise Analyzer
17. A Universal Modular Hybrid LDO With Fast Load Transient Response and Programmable PSRR in 14-nm CMOS Featuring Dynamic Clamp Strength Tuning
18. A Dual-Input, Digital Hybrid Buck-LDO System Featuring Fast Load Transient Response, Zero-Wire Current Handover & Input PDN Resonance Reduction
19. A 1S Direct-Battery-Attach Integrated Buck Voltage Regulator with 5-Stack Thin-Gate 22nm FinFET CMOS Featuring Active Voltage Balancing and Cascaded Self-Turn-ON Drivers
20. A 32A 5V-Input, 94.2% Peak Efficiency High-Frequency Power Converter Module Featuring Package-Integrated Low-Voltage GaN NMOS Power Transistors
21. Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities
22. A Time-/Frequency-Domain Side-Channel Attack Resistant AES-128 and RSA-4K Crypto-Processor in 14-nm CMOS
23. Optimal variable switching frequency scheme for reducing switching loss in single-phase inverters based on time-domain ripple analysis
24. Session 17 Overview: DC-DC Converters
25. 17.4 Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing
26. EM and Power SCA-Resilient AES-256 Through >350× Current-Domain Signature Attenuation and Local Lower Metal Routing
27. A 1S Direct-Battery-Attach Buck Voltage Regulator With 5-Stack Thin-Gate 22-nm FinFET CMOS Featuring Active Voltage Balancing and Cascaded Self-Turn-ON Drivers
28. A Novel Cuckoo Search Structure Optimized Neural Network for Efficient Data Aggregation in Wireless Sensor Network
29. Advanced bus-clamping PWM techniques based on space vector approach
30. A Dual-Rail Hybrid Analog/Digital LDO with Dynamic Current Steering for Tunable High PSRR and High Efficiency
31. A SCA-Resistant AES Engine in 14nm CMOS with Time/Frequency-Domain Leakage Suppression using Non-Linear Digital LDO Cascaded with Arithmetic Countermeasures
32. An Autonomous Reconfigurable Power Delivery Network (RPDN) for Many-Core SoCs Featuring Dynamic Current Steering
33. A Variation-Adaptive Integrated Computational Digital LDO in 22-nm CMOS With Fast Transient Response
34. Digital Control of Switching and Linear Integrated Voltage Regulators
35. 27.3 EM and Power SCA-Resilient AES-256 in 65nm CMOS Through >350× Current-Domain Signature Attenuation
36. A Dual-Rail Hybrid Analog/Digital Low-Dropout Regulator With Dynamic Current Steering for a Tunable High PSRR and High Efficiency
37. A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm CMOS With 2.5-nH Package-Embedded Air-Core Inductors
38. A Variation-Adaptive Integrated Computational Digital LDO in 22nm CMOS with Fast Transient Response
39. 14.7 A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation
40. 8.5 A Fully Integrated Voltage Regulator in 14nm CMOS with Package-Embedded Air-Core Inductor Featuring Self-Trimmed, Digitally Controlled Variable On-Time Discontinuous Conduction Mode Operation
41. A Digitally Controlled Fully Integrated Voltage Regulator With 3-D-TSV-Based On-Die Solenoid Inductor With a Planar Magnetic Core for 3-D-Stacked Die Applications in 14-nm Tri-Gate CMOS
42. A Digitally Controlled Fully Integrated Voltage Regulator With On-Die Solenoid Inductor With Planar Magnetic Core in 14-nm Tri-Gate CMOS
43. A digitally controlled linear regulator for per-core wide-range DVFS of atom™ cores in 14nm tri-gate CMOS featuring non-linear control, adaptive gain and code roaming
44. A digitally controlled fully integrated voltage regulator with 3D-TSV based on-die solenoid inductor with backside planar magnetic core in 14nm tri-gate CMOS
45. Digitally controlled voltage regulator using oscillator-based ADC with fast-transient-response and wide dropout range in 14nm CMOS
46. 20.1 A digitally controlled fully integrated voltage regulator with on-die solenoid inductor with planar magnetic core in 14nm tri-gate CMOS
47. A 0.4V∼1V 0.2A/mm2 70% efficient 500MHz fully integrated digitally controlled 3-level buck voltage regulator with on-die high density MIM capacitor in 22nm tri-gate CMOS
48. Low power all digital acoustic noise suppression technique for switching voltage regulators
49. Reduction of Torque Ripple in Induction Motor Drives Using an AdvancedHybrid PWM Technique
50. Metallurgical and corrosion characterization of a martensitic stainless steel as a function of silicon content
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