46 results on '"Lakshminarayana, Ganesh"'
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2. Common-case computation: a high-level energy and performance optimization technique
3. Analysis of power dissipation in embedded systems using real-time operating systems
4. High-level energy macromodeling of embedded software
5. High-level test compaction techniques
6. High-level synthesis of low-power control-flow intensive circuits
7. FACT: a framework for applying throughput and power optimizing transformations to control-flow-intensive behavior descriptions
8. Behavioral synthesis of fault secure controller/datapaths based on aliasing probability analysis
9. Testing of core-based systems-on-a-chip
10. LOTTERYBUS
11. Input space adaptive design
12. Transient power management through high level synthesis.
13. Input space adaptive design.
14. LOTTERYBUS.
15. Communication architecture tuners.
16. Power analysis of embedded operating systems.
17. Integrating variable-latency components into high-level synthesis
18. TAO-BIST: a framework for testability analysis and optimization for built-in self-test of RTL circuits
19. Incorporating speculative execution into scheduling of control-flow-intensive designs
20. Power analysis of embedded operating systems
21. Communication architecture tuners
22. Common-case computation
23. Wavesched: a novel scheduling technique for control-flow intensive designs
24. High-level synthesis of power-optimized and area-optimized circuits from hierarchical data-flow intensive behaviors
25. Synthesis of power-optimized and area-optimized circuits from hierarchical behavioral descriptions
26. Incorporating speculative execution into scheduling of control-flow intensive behavioral descriptions
27. FACT
28. Removal of memory access bottlenecks for scheduling control-flow intensive behavioral descriptions
29. Transforming control-flow intensive designs to facilitate power management
30. Fast high-level power estimation for control-flow intensive design
31. COSYN
32. A framework for testing core-based systems-on-a-chip.
33. Common-case computation.
34. Memory binding for performance optimization of control-flow intensive behaviors.
35. Transforming control-flow intensive designs to facilitate power management.
36. Removal of memory access bottlenecks for scheduling control-flow intensive behavioral descriptions.
37. Wavesched.
38. Synthesis of power-optimized and area-optimized circuits from hierarchical behavioral descriptions.
39. Incorporating speculative execution into scheduling of control-flow intensive behavioral descriptions.
40. FACT.
41. COSYN.
42. Memory Binding for Performance Optimization of Control-Flow Intensive Behavioral Descriptions.
43. Input Space Adaptive Design: A High-Level Methodology for Optimizing Energy and Performance.
44. Design of High-Performance System-On-Chips Using Communication Architecture Tuners.
45. High-Level Energy Macromodeling of Embedded Software.
46. Input Space Adaptive Embedded Software Synthesis.
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