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1. LLR estimation using machine learning

Author

Latifa Mostari, Alban Goupil, and Abdelmalik Taleb-Ahmed

Subjects
LLR, High order modulations, BPSK, Estimation, Approximation, Machine learning, Engineering (General). Civil engineering (General), TA1-2040
Abstract

Many decoders of error-correcting codes use the Log-Likelihood Ratio (LLR) as an input, which involves the probability density function (pdf) of the noise. In impulsive noise, the pdf of the noise is not accessible in closed form and is only available through very complex numerical computation. Therefore, the LLR calculation for Binary Phase Shift Keying (BPSK) is too complex. It becomes even more complex for high-order modulations. Moreover, the LLR computational complexity grows as the modulation order increases. The main contribution of our work lies in the LLR approximation for high-order modulations and its estimation using supervised machine learning, without requiring prior knowledge of the noise distribution model. To this end, we propose two approaches to approximate the LLR values using supervised machine learning, for high-order modulated symbols. The first approach can also be used for BPSK modulated symbols. The second approach aims to approximate the LLR for high-order modulated symbols in a more simplified manner compared to the first approach. For both approaches, we estimate the parameters of the approximate LLR under known noise channel conditions using the linear regression algorithm. To estimate these parameters without prior knowledge of the noise distribution model, we use a binary logistic regression algorithm. Our simulations focus on the second proposed approach to estimate the LLR with unknown noise distributions. The results are presented for the 4-ASK (Amplitude Shift Keying) modulation scheme, where the receiver is assumed to suffer from noise ranging from Gaussian to highly impulsive models. The proposed LLR estimation is shown to achieve a comparable performance to the one attained using the exact LLR function.

Published
2024
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2. High performance short-block binary regular LDPC codes

Author

Latifa Mostari and Abdelmalik Taleb-Ahmed

Subjects
Engineering (General). Civil engineering (General), TA1-2040
Abstract

LDPC code shows a good performance with long-block codes. However, certain channels are constrained to use short-block codes due to latency. Therefore, concatenated LDPC codes with iterative decoding is a good choice to get a good performance. Concatenated binary LDPC codes were introduced as a class of concatenated codes in which the LDPC codes are irregular codes having different parameters. Although irregular LDPC codes are more efficient than regular codes, irregular LDPC codes have an error floor and a higher encoding complexity than regular code. In this paper, in order to get a good performance/complexity trade-off with a short-block code, we investigate a parallel concatenation of two identical regular binary LDPC codes, using an interleaver. Simulation results show that the proposed code outperforms a single LDPC code. The proposed code needs less time decoding delay than a single LDPC code with the same iteration number. Also, the proposed code needs a less number of iterations to achieve the same performance of a single LDPC code that leads to less decoding complexity and decoding delay. A simplified algorithm, the min-sum algorithm, that is used to decode the component codes shows a small performance loss with respect to the sum-product algorithm. Keywords: LDPC code, Parallel concatenation, Iterative decoding, Sum-product algorithm, Min-sum algorithm

Published
2018
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4. Serial Concatenation of Binary LDPC Codes with Iterative Decoding

Author

Latifa Mostari, Abdelmalik Taleb-Ahmed, University Hassiba Benbouali of Chlef, Institut d’Électronique, de Microélectronique et de Nanotechnologie - Département Opto-Acousto-Électronique - UMR 8520 (IEMN-DOAE), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), COMmunications NUMériques - IEMN (COMNUM - IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), and NONE FOUND.

Subjects
Computer science, Concatenation, Binary number, Data_CODINGANDINFORMATIONTHEORY, iterative decoding, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], [SPI.TRON]Engineering Sciences [physics]/Electronics, serial concatenation, [INFO.INFO-NI]Computer Science [cs]/Networking and Internet Architecture [cs.NI], [SPI]Engineering Sciences [physics], [INFO]Computer Science [cs], Hardware_ARITHMETICANDLOGICSTRUCTURES, Low-density parity-check code, "LDPC codes", [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, Algorithm, Gray-QAM constellation, Decoding methods
Abstract

International audience; In this paper, a binary serial turbo LDPC code is presented. It represents a serial concatenated LDPC codes separated by interleavers, with iterative decoding. In this work, we aim to investigate the performance evaluation of concatenated code, with reduced complexity and decoding delay, associated with high order constellation using Gray mapping, over Gaussian and Rayleigh channels. Simulation results show that the performance of a serial concatenated LDPC codes is higher than that of single LDPC code with the same code rate and code block length.

Published
2020
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6. Non-Binary Parallel Turbo LDPC Codes Associated with High Order Constellation

Author

Abdelmalik Taleb-Ahmed, Latifa Mostari, Abdennacer Bounoua, University Hassiba Benbouali of Chlef, Institut d’Électronique, de Microélectronique et de Nanotechnologie - Département Opto-Acousto-Électronique - UMR 8520 (IEMN-DOAE), Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF), COMmunications NUMériques - IEMN (COMNUM - IEMN), Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)-Institut d’Électronique, de Microélectronique et de Nanotechnologie - UMR 8520 (IEMN), and Centrale Lille-Institut supérieur de l'électronique et du numérique (ISEN)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Université de Lille-Centre National de la Recherche Scientifique (CNRS)-Université Polytechnique Hauts-de-France (UPHF)

Subjects
"turbo-code", biology, Computer science, Turbo, "Low-Density Parity-Check codes", "non-binary", Binary number, Data_CODINGANDINFORMATIONTHEORY, biology.organism_classification, [INFO.INFO-AI]Computer Science [cs]/Artificial Intelligence [cs.AI], [SPI.TRON]Engineering Sciences [physics]/Electronics, [INFO.INFO-NI]Computer Science [cs]/Networking and Internet Architecture [cs.NI], [SPI]Engineering Sciences [physics], "parallel concatenation", "iterative decoding", [INFO]Computer Science [cs], Low-density parity-check code, High order, Algorithm, [SPI.SIGNAL]Engineering Sciences [physics]/Signal and Image processing, Constellation
Abstract

International audience; Since the non-binary LDPC (Low-Density Parity-Check) codes offer better performance than binary LDPC codes for a system using high order constellations such as the QAM (Quadrature Amplitude Modulation), one proposes in this paper a high non-binary LDPC code, called a parallel nonbinary turbo LDPC code. It is obtained by a parallel concatenation of two identical regular non-binary LDPC codes, separated by an interleaver introducing the diversity through the turbo-code structure proposed by Berrou and others. Regular codes were used to avoid the complexity of irregular codes despite that they have better performance than the regular code. In our simulation, we evaluate overRayleigh and Gaussian channels, the performance of the proposed code combined with a 16-QAMusing Gray mapping. We show that the parallel non-binary turbo LDPC code outperforms a single non-binary LDPC code, with the same code length and code rate. Also, we note that its performance can be improved with the increase of two numbers of iterations: global iterations and iterations of non-binary LDPC codes.

Published
2020
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8. Simplified Log - Likelihood Ratio Calculation for Binary LDPC Codes

Author

Abdelmalik Taleb Ahmed, Latifa Mostari, Laboratoire d'Automatique, de Mécanique et d'Informatique industrielles et Humaines - UMR 8201 (LAMIH), and Université de Valenciennes et du Hainaut-Cambrésis (UVHC)-Centre National de la Recherche Scientifique (CNRS)-INSA Institut National des Sciences Appliquées Hauts-de-France (INSA Hauts-De-France)

Subjects
Gray mapping, Discrete mathematics, Quadrature Amplitude Modulation (QAM), General Engineering, Binary number, Data_CODINGANDINFORMATIONTHEORY, Low-density parity-check (LDPC) codes, non-binary, [SPI.AUTO]Engineering Sciences [physics]/Automatic, Computer Science::Hardware Architecture, lcsh:TA1-2040, Log-likelihood Ratio (LLR), Likelihood-ratio test, lcsh:Technology (General), lcsh:T1-995, Low-density parity-check code, lcsh:Engineering (General). Civil engineering (General), Computer Science::Information Theory, Mathematics
Abstract

International audience; Combining binary LDPC codes and high order constellations is a simple but effective way to improve the bandwidth efficiency. Since the binary LDPC codes require soft decisions as the input information, the constellation has to provide soft information calculated by Log-Likelihood Ratio (LLR) to it. In this paper, a simplified algorithm to calculate LLR for binary turbo-codes is applied for binary LDPC codes. Simulation results show that the simplified algorithm have a very small performance loss over Gaussian and Rayleigh channels.

Published
2017
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9. Simplified soft output demapper for non-binary LDPC codes

Author

Abdennacer Bounoua, Abdelmalik Taleb-Ahmed, Latifa Mostari, Université Djilali Liabès [Sidi-Bel-Abbès], Laboratoire d'Automatique, de Mécanique et d'Informatique industrielles et Humaines - UMR 8201 (LAMIH), and INSA Institut National des Sciences Appliquées Hauts-de-France (INSA Hauts-De-France)-Centre National de la Recherche Scientifique (CNRS)-Université de Valenciennes et du Hainaut-Cambrésis (UVHC)

Subjects
Computer science, Error floor, Binary number, Spectral efficiency, Data_CODINGANDINFORMATIONTHEORY, "QAMGray mapping", Atomic and Molecular Physics, and Optics, Electronic, Optical and Magnetic Materials, [SPI.AUTO]Engineering Sciences [physics]/Automatic, QAM, "Non-binary", Turbo code, Code (cryptography), "Low-density parity-check (LDPC) codes", Binary code, Electrical and Electronic Engineering, Low-density parity-check code, "Log-likelihood ratio (LLR)", Algorithm, Computer Science::Information Theory
Abstract

International audience; Combining non-binary LDPC codes and high order constellation, namely Bit-Interleaved Coded Modula-tion (BICM), is a simple but effective way to improve the bandwidth efficiency. Since the non-binary LDPCcodes require soft decisions as the input information, the constellation has to provide soft information(log-likelihood ratio) to it. In this paper, a simplified algorithm to calculate LLR for binary code is appliedfor non-binary code, which will remarkably reduce the computational complexity, and has nearly noperformance loss

Published
2015
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