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In order to improve the trade-off between the 4H-SiC planar Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) and super junction MOSFET (SJ-MOSFET), particularly on the drain to source capacitance (C ds) which affects the switching performance, this study investigates the C ds of the quasi SJ-MOSFETs with various P-pillar widths, depths, and concentrations. The measured results show (1) when the N -type region between the P-pillars (Epi-1 region) is fully depleted, the C ds value abruptly drops, (2) when the N -type drift region beneath the P-pillar (Epi-2 region) is fully depleted, the slope of the C ds -V ds curve slowly changes because of the small extension of the depletion region in the P-type region. This is because the wider P-pillar width will increase the magnitude of the abrupt drop of the C ds and make the drop occur earlier; the abrupt drop of the C ds will occur later and the magnitude increases when the P-pillar depth is deeper due to the larger P-type region; Moreover, increasing the P-pillar concentration not only initiates the abrupt drop earlier and increases the magnitude, but also increases the minimum saturation value of the C ds at a higher reverse bias. This study also reveals that the mechanism of the C ds formation in a quasi SJ-MOSFET is different from the planar MOSFET and SJ-MOSFET. Finally, the simulated results are used to validate the influence of the P-pillar structures on the C ds – V ds curves in a quasi SJ-MOSFET. [ABSTRACT FROM AUTHOR]

The goal of this study is to investigate the performance of a small vertical-axis wind turbine at an environment with the turbulence intensity more than 30%, particularly on the influence of the vertical wind, the vertical angle, the wind with the unknown direction, the horizontal wind speed, and the turbulence intensity on the power output, which are seldom reported before. The results show that more than 90% of the power is generated when the vertical angle is less than or equal to 45°. The vertical wind speed has the obvious influence on the power when the horizontal wind speed is between 5 m/s and 8 m/s. The percentage of the power generated by the wind with the unknown direction decreases from 31.1% to 8.4% as the horizontal wind speed increases from 4 m/s to 9 m/s. The efficiency is over 40% only when the horizontal wind speed is over 8 m/s. The higher turbulence intensity increases the power at the lower wind speed, but decreases the power at the higher wind speed. Furthermore, the results can be used as a reference for the improvement of aerodynamic characteristics, efficiency, CFD simulation and the location selection of a vertical-axis wind turbine. [ABSTRACT FROM AUTHOR]

The purpose of this study is to develop a novel algorithm for a single-axis maximum power generation sun tracker in order to identify the optimal stopping angle for generating the maximum amount of daily electric energy. First, the photovoltaic modules of the single-axis maximum power generation sun tracker are automatically rotated from 50° east to 50° west. During the rotation, the instantaneous power generated at different angles is recorded and compared, meaning that the optimal angle for generating the maximum power can be determined. Once the rotation (detection) is completed, the photovoltaic modules are then rotated to the resulting angle for generating the maximum power. The photovoltaic module is rotated once per hour in an attempt to detect the maximum irradiation and overcome the impact of environmental effects such as shading from cloud cover, other photovoltaic modules and surrounding buildings. Furthermore, the detection range is halved so as to reduce the energy consumption from the rotation operations and to improve the reliability of the sun tracker. The results indicate that electric energy production is increased by 3.4% in spring and autumn, 5.4% in summer, and 8.3% in winter, compared with that of the same sun tracker with three fixed angles of 50° east in the morning, 0° at noon and 50° west in the afternoon. [ABSTRACT FROM AUTHOR]

A novel diagonal square array junction barrier Schottky (JBS) diode is created to enhance the forward current and reverse breakdown voltage by increasing the Schottky contact area and shortening the diagonal spacing between two adjacent p+ islands in the active area of a JBS diode. The shape of the p+ islands is square and the positional arrangement of the p+ islands is a diagonal array. Half of the upper and lower p+ islands with smaller areas are connected with the innermost p+ guard ring to create more Schottky contact area and laterally extend the electric field to the edge termination. Results show that the forward current density and reverse breakdown voltage for the diagonal square array JBS diode are 4.2% and 10.7% higher than those for the conventional square array JBS diode, respectively. As the spacing increases, the breakdown voltage for the diagonal square array JBS diode and the conventional square array JBS diode decrease by 3.5% and 7.3%, respectively, indicating that the diagonal square array JBS has more uniform depletion regions and electric field to retain the breakdown voltage. [ABSTRACT FROM AUTHOR]

A mathematical model is developed by fitting the discharging curve of LiFePO 4 batteries and used to investigate the relationship between the state of charge and the closed-circuit voltage. The proposed mathematical model consists of dual exponential terms and a constant term which can fit the characteristics of dual equivalent RC circuits closely, representing a LiFePO 4 battery. One exponential term presents the stable discharging behavior and the other one presents the unstable discharging behavior and the constant term presents the cut-off voltage. [ABSTRACT FROM AUTHOR]

Highlights: [•] Wet oxidation at 950°C followed by NO anneal at 1175°C reduces the interface trap density to 4–6×1011 cm−2 eV−1. [•] The positive flat band voltage shift caused by low temperature wet oxidation can be suppressed by the following NO anneal. [•] The oxide breakdown fields for Al- and N-implanted C-face 4H-SiC samples are about 1.5 and 5MVcm−1, respectively. [•] The oxide breakdown field of dry oxidation at 950°C is the same as that of wet oxidation at 950°C. [ABSTRACT FROM AUTHOR]

Abstract: Thermal and pulsed excimer laser treatments have been applied for the post-implant anneals of Al- and N-implanted 3C-SiC samples to recover crystal damage caused by the ion implantation. FTIR reflectivity spectra show that the thermal anneal carried out at 1350°C for 30min has the better damage recovery in a range of the reststrahlen bands of both Al- and N-implanted samples. However, shoulders in the XRD spectra caused by the implantation indicate that a thermal anneal cannot completely recover the damage throughout an entire sample. For the Al-implanted samples, laser pulses with various energy densities can move shoulders to higher 2θ angles and then merge shoulders with the major peaks at the total energy density of 583.7J/cm2. 150 shots of laser pulses at the energy density of 256mJ/cm2 and combining with other energy densities can be used to recover damage in a range of the reststrahlen band which is induced by laser irradiation. Furthermore, the damage caused by the implantation in N-implanted samples is not close to the major peak in the XRD spectra, which can be improved by the laser pulses as well, but not moved to higher 2θ angles. However, the applied energy densities create extra damage in a range of the reststrahlen band. [Copyright &y& Elsevier]

The correlation between barrier inhomogeneities of 4H-SiC Schottky barrier diodes (SBDs) and surface defects and traps for SBDs fabricated with and without chemical–mechanical polishing (CMP) is investigated. 60% of the barrier inhomogeneities of SBDs with invisible surface defects are eliminated when CMP is applied in the refabrication. About 40% of SBDs with carrots inside the active areas exhibit double barriers without using CMP. This excludes that carrots are a cause of barrier inhomogeneities. However, none of the barrier inhomogeneities of the SBDs with carrots can be eliminated by using CMP. Most barrier inhomogeneities of SBDs with various surface defects inside the active areas can be improved by CMP. The difference between the high and low barrier heights of an SBD with CMP was reduced to about 0.02–0.06 eV. Therefore, the leakage current induced by barrier inhomogeneities is also reduced by CMP. Moreover, SBDs with a resistive termination extension (RTE) have a higher barrier height than SBDs without RTE, and there is no direct evidence to show that the inclusion of RTE can induce barrier inhomogeneities. [ABSTRACT FROM AUTHOR]

Abstract: In this paper, nitrogen-doped 4H-Silicon carbide (SiC) epilayers are grown on 4° off-axis C-face 4H-SiC substrates by horizontal hot-wall chemical vapor deposition. Surface morphology of the epilayers shows a strong dependence on N2 flow, C/Si ratio and growth temperature. Surface defect densities are higher for samples grown under high C/Si ratio and high N2 flow condition. Lightly doped epilayers with low defect densities have been achieved by growing under optimized conditions. Macrostep bunching is observed on epilayers grown under high N2 flow condition. The degree of step bunching manifests a dependence on N2 flow. Possible impurity-induced step-bunching mechanism is discussed to explain the results. Lightly doped C-face 4H-SiC epilayers exhibit a site-competition effect, while heavily doped epilayers do not. Schottky barrier diodes fabricated on C-face 4H-SiC epilayers are shown to be comparable to or outperform those on Si-face epilayers. [Copyright &y& Elsevier]

Abstract: The goal of this research is to investigate the correlation of reverse characteristics of Schottky barrier diodes (SBDs) and surface morphological defects on 4° (off-axis) carbon (C) face, 4° and 8° silicon (Si) face 4H-SiC. Different dimensions of SBDs with boron-implanted edge terminations are fabricated on 4° C-face, 4° and 8° Si-face 4H-SiC samples. The ideality factor for these three samples is about 1.1. Average breakdown voltages of 4° Si-face 4H-SiC SBDs are higher than the other two samples, particularly for large size SBDs. Breakdown voltages of 1500 and 2000μm 4° Si-face SBDs can reach over 1000V. This value is about two times higher than the other two samples, though the root-mean-square (RMS) roughness of 4° Si-face samples obtained from atomic force microscopy (AFM) is 3.5nm. The yield of 1500 and 2000μm 4° Si-face 4H-SiC SBDs with a breakdown voltage over 1000V is more than 50%, much higher than the other two samples. [Copyright &y& Elsevier]

Abstract: Multiscale entropy (MSE) is a prevalent algorithm used to measure the complexity of a time series. Because the coarse-graining procedure reduces the length of a time series, the conventional MSE algorithm applied to a short-term time series may yield an imprecise estimation of entropy or induce undefined entropy. To overcome this obstacle, the modified multiscale entropy (MMSE) was developed. The coarse-graining procedure was replaced with a moving-average procedure and a time delay was incorporated for constructing template vectors in calculating sample entropy. For conducting short-term time series analysis, this study shows that the MMSE algorithm is more reliable than the conventional MSE. [Copyright &y& Elsevier]

This work demonstrates a trench isolated lateral double-implanted MOSFET (LDMOS) on Si-face in 4H-silicon carbide (SiC). A device $\vphantom {_{\int _{}}}$ where ${L}_{\textit {ch}} = 0.8\,\,\mu \text{m}$ and ${L}_{d} = 12\,\,\mu \text{m}$ shows an ${R}_{ \mathrm{\scriptscriptstyle ON},\text {sp}}$ of 22.9 $\text{m}\Omega $ cm2 at a ${V}_{\text {GS}}$ of 20 V and a breakdown voltage (BV) of 1100 V, corresponding to a high BV2/ ${R}_{ \mathrm{\scriptscriptstyle ON},\text {sp}}$ of 55.5 MW/cm2. Devices that have different ${L}_{\text {ch}}$ , ${L}_{\text {JFET}}$ , ${L}_{d}$ , and P-top dose values are measured in order to investigate the effects of geometry on the static performance. Operations at 150 °C are measured to evaluate the temperature performance. Gate charge waveforms are also measured in order to include the switching performance in the evaluation. The ${R}_{ \mathrm{\scriptscriptstyle ON}} \times {Q}_{G}$ and ${R}_{ \mathrm{\scriptscriptstyle ON}} \times {Q}_{\text {GD}}$ values are calculated as 17.7 and $9.0~\Omega $ nC, respectively, which are promising for power-integrated circuit applications. [ABSTRACT FROM AUTHOR]

The present study develops a hybrid PV system (HyPV) which operates at stand-alone PV mode and grid mode automatically and does not feed power into grid. HyPV operates at PV mode when solar radiation or battery energy is high enough. It switches to grid mode when battery storage is low. The switch scheme from grid to PV mode determines the system performance, including life of battery and switching device, and PV energy generation loss. A switching control parameter ( S B , critical charge energy in grid mode) is defined as function of normalized excess PV power generation ( e B ) and used in the study. A system simulation was carried out to study the effect of switching schemes on long-term system performance. A HyPV system was built and tested to exam the field performance. [ABSTRACT FROM AUTHOR]

AlGaN/GaN dual metal Schottky barrier diodes (SBD) are demonstrated on a silicon substrate. The anode is composed of two metals with different work functions to achieve a better trade-off between the forward and the reverse characteristics. The low work function metal Ti reduces the turn-on voltage and the high work function metal Ni at the edge of the anode reduces the reverse leakage current and maintains the breakdown voltage. The turn-on voltage of the Ni-SBD is reduced from 1.47 V to 0.57 V by employing the dual metal anode, and the breakdown voltages are virtually unaffected. [ABSTRACT FROM AUTHOR]

In this paper, a comparison of different techniques for SiC high-voltage devices is performed using numerical simulations. In particular, the method of counter doping (CD) introduced in the junction termination extension (JTE) region to create a multizone termination effect is investigated. Simulation shows that compared with the other edge termination techniques, CD-JTE greatly reduces the sensitivity of breakdown voltage (BV) to JTE doses and surface charges. The multizone CD-JTE with outer rings shows that for a 30- \mu m thick epi-layer, 90% of the theoretical BV is achievable with a wide tolerance of 11\,\times \,10^{\mathrm {12}} /cm ^{2} to the JTE dose and 85% of the theoretical BV with an increased tolerance of 6.19\times 10^\mathrm 12 /cm ^2 to the positive surface charges, both superior to other JTE structures investigated in this paper. [ABSTRACT FROM AUTHOR]

Abstract: Multiscale entropy (MSE) is an effective algorithm for measuring the complexity of a time series that has been applied in many fields successfully. However, MSE may yield an inaccurate estimation of entropy or induce undefined entropy because the coarse-graining procedure reduces the length of a time series considerably at large scales. Composite multiscale entropy (CMSE) was recently proposed to improve the accuracy of MSE, but it does not resolve undefined entropy. Here we propose a refined composite multiscale entropy (RCMSE) to improve CMSE. For short time series analyses, we demonstrate that RCMSE increases the accuracy of entropy estimation and reduces the probability of inducing undefined entropy. [Copyright &y& Elsevier]

Design and fabrication of 4H–SiC lateral high-voltage devices on semi-insulating substrates based on the charge compensation principle have been investigated in this work. In the simulation, field plates are critical in relieving the electric field crowding at junction corners at high reverse biases. By incorporating field plates with proper lengths, the breakdown voltage (BV) of a single-zone reduced-surface-field (RESURF) device with a 100- \mu\m drift region can be improved from 3360 to 5880 V. The BV can be further enhanced to 8000 V by using a two-zone RESURF structure. The reduction in BV by 10% charge imbalance variation is also improved from 49% for a single-zone structure to 36% for a two-zone structure. Simulation also shows that oxide charges and other surface charges will offset the optimized charge imbalance conditions and, therefore, should be considered in design if the amount is significant. A 4H–SiC JFET with a two-zone RESURF region was fabricated to demonstrate the advantages of lateral devices based on these concepts. The fabricated lateral 4H–SiC JFET has a BV of 4200 V and a specific on -resistance of 454 \m\Omega\cdot \cm^2. The figure of merit is as high as 38.8 \MW/cm^2. [ABSTRACT FROM AUTHOR]

ABSTRACT This article presents a balanced pulse-modulated polar transmitter that is capable of withstanding load mismatch and out-of-band reflection. The balanced architecture directs the reflected power to the isolated port of the 90°-hybrid coupler. Using a rectifier, the reflected power can be recycled and used for assisting the supply of the polar transmitter. A prototype system was implemented and measurement was performed for validation. © 2014 Wiley Periodicals, Inc. Microwave Opt Technol Lett 56:1452-1454, 2014 [ABSTRACT FROM AUTHOR]