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Ferroelectricity in hafnium zirconium oxide (Hf1 − xZrxO2) and the factors that impact it have been a popular research topic since its discovery in 2011. Although the general trends are known, the interactions between fabrication parameters and their effect on the ferroelectricity of Hf1 − xZrxO2 require further investigation. In this paper, we present a statistical study and a model that relates Zr concentration (x), film thickness (tf), and annealing temperature (Ta) with the remanent polarization (Pr) in tungsten (W)-capped Hf1 − xZrxO2. This work involved the fabrication and characterization of 36 samples containing multiple sets of metal-ferroelectric-metal capacitors while varying x (0.26, 0.48, and 0.57), tf (10 and 19 nm), and Ta (300, 400, 500, and 600 ° C). In addition to the well-understood effects of x and Ta on the ferroelectricity of Hf1 − xZrxO2, the statistical analysis showed that thicker Hf1 − xZrxO2 films or films with higher x require lower Ta to crystallize and demonstrated that there is no statistical difference between samples annealed to 500 and 600 ° C, thus suggesting that most films fully crystallize with Ta ∼ 500 ° C for 60 s. Our model explains 95% of the variability in the Pr data for the films fabricated, presents the estimates of the phase composition of the film, and provides a starting point for selecting fabrication parameters when a specific Pr is desired. [ABSTRACT FROM AUTHOR]

Ir is a common impurity in the edge-defined film-fed growth method used to produce high-power Ga2O3 device structures and growth substrates; yet, the effects of this deep level defect on carrier transport and recombination, particularly at high device processing and operating temperatures and at metal interfaces, have yet to be explored. The optical and electronic nature of Ir in Ga2O3 and at Ir/ Ga2O3 interfaces change on a near-nanometer to micrometer scale after nitrogen rapid thermal annealing; the understanding and control of which could lower defect-assisted tunneling, improve diode rectification, and preserve critical electric field strength. Depth-resolved cathodoluminescence spectroscopy, interface electronic current, and capacitance–voltage measurements reveal how this dominant impurity in bulk, edge-fed crystal growth diffuses, evolves with temperature, and impacts defect formation and Schottky barrier formation. [ABSTRACT FROM AUTHOR]

Thin (40–150 nm), highly doped n+ (1019–1020 cm−3) Ga2O3 layers deposited using pulsed laser deposition (PLD) were incorporated into Ti/Au ohmic contacts on (001) and (010) β-Ga2O3 substrates with carrier concentrations between 2.5 and 5.1 × 1018 cm−3. Specific contact resistivity values were calculated for contact structures both without and with a PLD layer having different thicknesses up to 150 nm. With the exception of a 40 nm PLD layer on the (001) substrate, the specific contact resistivity values decreased with increasing PLD layer thickness: up to 8× on (001) Ga2O3 and up to 16× on (010) Ga2O3 compared with samples without a PLD layer. The lowest average specific contact resistivities were achieved with 150 nm PLD layers: 3.48 × 10−5 Ω cm2 on (001) Ga2O3 and 4.79 × 10−5 Ω cm2 on (010) Ga2O3. Cross-sectional transmission electron microscopy images revealed differences in the microstructure and morphology of the PLD layers on the different substrate orientations. This study describes a low-temperature process that could be used to reduce the contact resistance in Ga2O3 devices. [ABSTRACT FROM AUTHOR]

Thermally stimulated techniques—thermally stimulated current (TSC) spectroscopy and thermally stimulated depolarization current (TSDC) spectroscopy—were used to comparatively study the electrical properties and deep level defects in β-Ga2O3 pulsed laser deposited thin films and Czochralski-grown bulk crystals. It was found that the samples are highly resistive and each sample may have different dark current activation energy. Deep level defects revealed by the thermally stimulated techniques vary from sample to sample. In addition to the common traps E1 (∼0.56 eV), E2 (∼0.84 eV), and E3 (∼0.99 eV), reported in the literature and revealed by DLTS studies of Ga2O3 bulk crystals, that were also found in our samples by the thermally stimulated techniques, a trap at ∼110 meV and several other traps are revealed specifically by TSDC between 105 and 225 K. [ABSTRACT FROM AUTHOR]

We demonstrated 500 °C operation of field-effect transistors made using ultra-wide bandgap semiconductor β-Ga2O3. Metal–semiconductor field-effect transistors were fabricated using epitaxial conductive films grown on an insulating β-Ga2O3 substrate, TiW refractory metal gates, and Si-implanted source/drain contacts. Devices were characterized in DC mode at different temperatures up to 500 °C in vacuum. These variable-temperature measurements showed a reduction in gate modulation of the drain current due to an increase in gate leakage across the gate/semiconductor Schottky barrier. Devices exhibited a reduction in transconductance with increasing temperature; despite this, drain current increased with temperature due to a reduction in threshold voltage caused by the de-trapping of electrons from deep-level traps. Devices also showed negligible change in semiconductor epitaxy and source/drain contacts, hence demonstrated recovery to their room-temperature electrical properties after the devices were tested intermittently at different high temperatures in vacuum. The mechanism of gate leakage was also explored, which implicated the presence of different conduction mechanisms at different temperatures and gate electric fields. [ABSTRACT FROM AUTHOR]

A wafer-level thin-film encapsulation process has been demonstrated to package radio-frequency (RF) microelectromechanical systems (MEMS) switches in this paper. Individual shunt capacitive switches were packaged in a ~ 1 nL inorganic enclosure with process temperatures not exceeding 300 [degrees]C. A shell covering the switch consisted of 10 nm of sputtered alumina and 1.67 [micro]m of sputtered silicon nitride dielectric film. The switch and dielectric shell were simultaneously wet-released through access channels in the shell. Following release, access channels were sealed with 10 nm of sputtered alumina and 2-4 [micro]m of either plasma-enhanced chemical vapor deposited silicon dioxide or silicon nitride. Electromagnetic simulation and RF test results before and after sealing show minimal RF degradation of switch performance. Before sealing, the insertion loss and isolation at 10 GHz averaged 0.12 and 10.7 dB, respectively. After sealing, the same devices had an average insertion loss and isolation of 0.12 and 10.1 dB, respectively. Complete characterization of the package atmosphere was not completed due to challenges in assessing nanoliter-scale volumes. [1724] Index Terms--Dielectric films, encapsulation, microelectromechanical devices, switches.