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A spatial and causal classification of process error provides opportunities for the accurate determination and efficient management of process error budget. Traditional metrology is posed with this dilemma: variability sampling requires cheap, highly repeatable metrology, such as electrical measurements, which also confound error sources of the variability sampled. In response, statistical metrology has been proposed as a novel combination of cost-effective metrology with subsequent statistical or experimental data processing to provide a technique that is capable of error decomposition into equipment causes. The methodology, consisting of 1) reticle and experiment design, 2) data filtering, and 3) error budget formulation, is presented and is general to a short-loop thin-film patterning sequence. A .35-[[micro]meter] polygate patterning sequence is chosen to demonstrate this technique. Reticle design and statistical filtering has been presented in a previous publication, and is summarized here. The second causal data filter is presented in this work. Aided by additional experimentation, a physical filter decomposes the separate contributions and interactions of the reticle and stepper. A portion of the error budget is calculated, including the effects of spatial correlation. The results of decomposition yields a numerical metric for equipment and process manufacturability. Results are presented that illustrate the use of the manufacturability metric in equipment selection and process design.

Modern submicron processes are more sensitive to both random and systematic wafer-level process variation than ever before. Given the dimensional control limitations of new technologies, the amount of wafer-to-wafer and within wafer nonuniformity of many steps is becoming a significant fraction of the total error budget, which already includes the usual step-to-step allocations. However, a significant portion of the total observed variability is systematic in nature. Accordingly, particle defects may not continue to dominate parametric yield loss without improved understanding of parametric variations. In this paper, we demonstrate the use of short-loop electrical metrology to carefully characterize and decouple wafer-level variability of several critical processing steps. More specifically, we present our method and give results obtained from variability analyses for lithography critical dimension (CD) and inter-level dielectric (ILD) thickness control. Using statistically designed experiments and dedicated test structures, the main factors affecting dielectric thickness variability has been identified. The systematic variability from a wafer stepper has been extracted using a physically based statistical data filter. Once isolated, the deterministic variability can be modeled and controlled to enhance process and circuit design for manufacturability (DFM). We hope that in the future this work will be coupled with novel DFM-oriented CAD tools that encapsulate this information in a fashion that makes it useful to process and circuit designers.

A design methodology for obtaining optimized, deep-submicrometer complementary metal oxide semiconductor devices for low temperature operation is presented. A new simulator that maximizes the balance between performance and reliability based on scaling criteria and process/device parameters is also introduced. It facilitates the design and process optimization of the device. A discussion of simulation and experimental results are also given.

In this work, Free Element method (FECM) is extended to solve incompressible Navier‐Stokes equations. The momentum equations are discretized by FECM, which permits overlapped elements. Then, the velocities at midpoints are interpolated by improved Momentum Interpolation Method to avoid oscillation caused by decoupling of velocity and pressure. At last, the pressure correction equation is solved to make sure the results satisfying continuity equation. The interpolation of midpoint's velocity is proved to be independent of the under‐relaxation factor and time step size. The deferred correction is employed for utilization of higher‐order discretization of convective terms. Taylor‐Green vortex, flow over a cylinder, lid‐driven flow, cooling tunnel, and flow over airfoil are simulated. The results computed by the proposed method are compared with exact solutions and benchmark solutions, which indicates that the new method has the second order accuracy in space. What is more, the proposed method works well on random node distributions as well, which means that the method is much robust. [ABSTRACT FROM AUTHOR]