31 results on '"Loveless, T. Daniel"'
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2. Enhancing internet of things security using entropy-informed RF-DNA fingerprint learning from Gabor-based images
3. Assessing Adversarial Replay and Deep Learning-Driven Attacks on Specific Emitter Identification-based Security Approaches
4. Improving RF-DNA Fingerprinting Performance in an Indoor Multipath Environment Using Semi-Supervised Learning
5. Pre-print: Radio Identity Verification-based IoT Security Using RF-DNA Fingerprints and SVM
6. Preprint: Using RF-DNA Fingerprints To Classify OFDM Transmitters Under Rayleigh Fading Conditions
7. An Analysis of Process Parameters for the Optimization of Specific Emitter Identification Under Rayleigh Fading
8. An Analysis of Process Parameters for the Optimization of Specific Emitter Identification Under Rayleigh Fading
9. Improving RF-DNA Fingerprinting Performance In An Indoor Multipath Environment Using Semi-Supervised Learning
10. RF Fingerprint-based Identity Verification in the Presence of an SEI Mimicking Adversary
11. An Assessment of Entropy-Based Data Reduction for SEI Within IoT Applications
12. CMOS Phase-Locked Loops
13. Radio Identity Verification-Based IoT Security Using RF-DNA Fingerprints and SVM
14. Electrical Measurement of Cell-to-Cell Variation of Critical Charge in SRAM and Sensitivity to Single-Event Upsets by Low-Energy Protons
15. A probabilistic analysis technique applied to a radiation-hardened-by-design voltage-controlled oscillator for mixed-signal phase-locked loops
16. Nelder-Mead Simplex Channel Estimation for the RF-DNA Fingerprinting of OFDM Transmitters Under Rayleigh Fading Conditions
17. Integration of Matched Filtering within the RF-DNA Fingerprinting Process
18. RF-DNA Fingerprint Classification of OFDM Signals Using a Rayleigh Fading Channel Model
19. An Electro-Optical Simulation Methodology for the Analysis of Single-Event Radiation Effects in Photonic Devices
20. Geometry-Aware Single-Event Enabled Compact Models for Sub-50 nm Partially Depleted Silicon-on-Insulator Technologies
21. Heavy-Ion Induced SETs in 32nm SOI Inverter Chains
22. The Quad-Path Hardening Technique for Switched-Capacitor Circuits
23. A New Error Correction Circuit for Delay Locked Loops
24. Single-Event-Hardened CMOS Operational Amplifier Design
25. Technology scaling and soft error reliability
26. Circuit-Level Layout-Aware Single-Event Sensitive-Area Analysis of 40-nm Bulk CMOS Flip-Flops Using Compact Modeling
27. Impact of Well Structure on Single-Event Well Potential Modulation in Bulk CMOS
28. A radiation-hardened delay-locked loop (DLL) utilizing a differential delay line topology
29. An RHBD Technique to Mitigate Missing Pulses in Delay Locked Loops
30. Single-event effects on ultra-low power CMOS circuits
31. RHBD Technique for Single-Event Charge Cancellation in Folded-Cascode Amplifiers.
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