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Fixed‐width Booth multiplier (FWBM) plays a significant role in the arouse of approximate computing (AC) field. In this paper, a row‐based binary‐weighted compensator (RBC) for fixed‐width Booth multiplication is proposed. The derived binary‐weighted close‐form minimizes the conversion loss and hardware cost. With the proposed close‐form, the partial product array can be reduced dramatically. Consequently, the compact FWBM with the proposed RBC not only shortens the critical path to at least 24% but also minimizes the power dissipation to at least 44%. Moreover, the proposed RBC outperforms the state‐of‐art with a maximum merit improvement of 39%. By implementing the proposed RBC‐FWBM in the FIR filter, we manage to demonstrate the practicality of the proposed design with a significant reduction in power‐dissipation and delay while maintaining high accuracy. [ABSTRACT FROM AUTHOR]

Approximate computing is widely used in a large number of error-tolerant applications. Multiplication is an integral arithmetic operation for many of these applications. In this paper we discuss 8 bit multiplier designs designed using approximate 4:2 compressors and encoded sum of partial products, and later introduce an approximate full adder to compute the sum of partial products in less significant bit positions. We use these techniques to systematically trade off accuracy for improvements in area, power and more significantly delay. These multipliers were designed using Verilog and synthesized using Cadence Design Suite with the help of a 45nm standard cell library. The physical designs of exact, existing and proposed multipliers were also performed using the open source RTL to GDS flow tool Q-flow. This is done to highlight the importance and reliability of open source tools in the VLSI physical design process when compared to paid software which may not be accessible to everyone.

This paper talks about real time 4096-pixel HEVC with 120 fps (frames-per-second) based scalable encoder for the purpose of HFR (high-frame-rate) surveillance videos that undergo encoding, transmission, and further processing. Motion depiction issues, for example, motion-blur and jerkiness might happen in videos that include speedy camera panning or quick-moving objects. A high-frame-rate (HFR) tackles such issues and gives an immersive viewing experience, which will precise even the quick-moving objects without uneasiness. Encoding real-time HFR videos with temporal scalability and minimal latency is needed to offer for HFR video services. A scalable multi-chip configuration is implemented in the proposed encoder that uses two large scale integration encoders of two 4096-pixel 60-fps to accomplish a complete 4096-pixel 120-fps. Moreover, coding efficiency is maintained by means of exchanging the reference picture information closer to the spatial slice boundaries that offers cross-chip motion estimation. The scalable encoder holds-up the bit-stream output with temporal-scalability, which is delivered across a single or double transmission channel. With the usage of motion vector restrictions, the complexity of the scalable encoder is reduced extensively, and achieves a low delay of 21.1 ms. [ABSTRACT FROM AUTHOR]

Copyright of Computer Measurement & Control is the property of Magazine Agency of Computer Measurement & Control and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

The increase in demand for video delivery over the last few years has led to a need for more compression efficiency. High efficiency video coding (HEVC) offers a better compression rate compared to the preceding standard codecs. However, the robustness of the coded stream is reduced in the low delay mode used for real-time applications. When a bitstream is transmitted over a hostile network, there is a high probability of burst network packet loss which can result in the loss of the entire frame. To deal with these signal degradations that occur in the transmission channel, an HEVC encoder adaptation scheme based on spatial multiple description coding (MDC) is proposed. A comparative study with the single description coding (SDC) scheme has shown its efficiency in improving the quality of the reconstructed video in the five packet loss cases studied and yields an average gain of about 14 to 35.57%. [ABSTRACT FROM AUTHOR]

To solve the problem of uncertain end-to-end transmission delay caused by the separation of time-sensitive traffic scheduling and routing in time-sensitive network, a multi-constrained traffic scheduling method with joint routing planning was proposed.The inter-flow conflict degree of time-sensitive traffic was introduced to flexibly allocated traffic routing.On that basis, a scheduling constraint model of time-aware shaping and joint conflict-free routing was established to strictly guarantee the time-sensitive traffic scheduling with bounded low latency in both spatial and temporal dimensions.Experimental results show that the proposed method has good delay performance in different topological scenarios, and effectively reduces the delay caused by congestion conflicts under different time-sensitive traffic scales while ensuring link load balancing.

Low-delay video coding systems are becoming more and more popular with each passing year. However, due to huge size of video data, raw video transmission is not possible, and compression is required. High efficiency video coding (HEVC) standard is able to compress videos at half the bitrate as compared to the previous standard. However, HEVC is extremely complex, and its software implementations are either coding-inefficient or slow. Hardware-based coding systems for HEVC, on the other hand, are not only able to achieve high throughput, but also offer low power consumption and some other benefits, when compared with software-based solutions. However, hardware efficiency can be achieved only when the underlying algorithm is hardware friendly. Of the many video encoder modules, motion estimation (ME) is the most computationally intensive one, which is why it is advisable to carry out ME on a hardware-based system, if high performance is required. Most of the ME algorithms presented in the literature focus only on coding efficiency and not on hardware efficiency. In this article, we present a coding- efficient ME algorithm which is more hardware friendly than most modern implementations. The proposed algorithm achieves a throughput of 4 K@42 frames per second (4 K = 3840 × 2160) at a maximum operating frequency of 200 MHz with no degradation in quality, and is comparable to state of the art algorithms, making it suitable for low delay video coding applications such as eHealth. [ABSTRACT FROM AUTHOR]

As an alternative of Internet protocol (IP) multicast, application layer multicast (ALM) is widely used with the advantage of simplicity and flexibility. However, the existing problems of large transmission delay and poor stability limit the application and development. In this article, to solve these problems, an ALM model based on node potential (NP) and topological index (TI) is proposed. The proposed model considers the factors of node capability and node distance in constructing and maintaining multicast tree to reduce transmission delay and increase stability, and thus it improves the application level in realtime multimedia multicast. The computer simulations prove that the proposed model reduces the ALM transmission delay, increases multicast tree stability effectively, and improves the ALM performance, and therefore it is suitable to apply in large-scale real-time multimedia environment. [ABSTRACT FROM AUTHOR]

Copyright of Journal on Communication / Tongxin Xuebao is the property of Journal on Communications Editorial Office and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

Underwater acoustic sensor networks (UASNs), which adopt acoustic communication, have been widely used underwater, such as in oceans and rivers, for monitoring applications. However, the UASNs designed for urban lake monitoring are facing challenges and are seldom regarded. Based on the analysis of the features of the urban lakes and the monitoring requirements, a UASN system is designed in this article. The node deployment strategy is discussed to balance the node density and transmission bandwidth. Then a hybrid topology is proposed to meet the monitoring requirements, in which the nodes on the water surface construct a 2-D ring topology, and the nodes underwater construct a 3-D grid structure. Based on this topology, a media access control (MAC) protocol-improved handshake-based low delay (i-HALO) is designed which improves the existing handshaking mechanism with a dynamic adaptive backoff algorithm to avoid unnecessary back off. As the result, the high delay problem is addressed and the “one handshake, multiple transmission” is realized. The channel access delay is analyzed theoretically and the formula of waiting time for a frame before sending is given. The performance of throughput and transmission delay under different node densities and frame lengths are simulated. The results indicate that a node having about 13 neighbors will have the best performance on throughput, and when the frame length is longer than 100 bytes, the throughput and delay will have fluctuation. In comparison with existing protocols, i-HALO has a better performance on throughput, delay, frame reception rate (FRR), and fairness. [ABSTRACT FROM AUTHOR]

Real-time applications (RTA) are an important use case for IEEE 802.11be, a new amendment to the Wi-Fi standard. This amendment introduces new complicated mechanisms to provide low delay and high reliability for RTA, but many of them are not supported by legacy devices that may be present in future Wi-Fi networks. In contrast, the preliminary channel access (PCA) method is designed to satisfy strict RTA requirements even in the presence of legacy devices and does not require significant changes to the Wi-Fi protocol. However, it significantly reduces the capacity for non-RTA traffic. This paper introduces a Smart PCA method, which improves the performance of all the stations in scenarios with multiple RTA stations. Extensive simulation shows that the Smart PCA method guarantees low delays for intensive RTA traffic in these scenarios. Moreover, it doubles the network capacity for the stations with non-RTA traffic. [ABSTRACT FROM AUTHOR]

A novel reduced power with enhanced speed (RPES) technique for Static Random Access Memory (SRAM) topologies using Carbon Nano Tube Field Effect Transistors (CNTFETs) instead of traditional MOSFETs which is in demand for edge AI devices, energy efficient deep neural networks, smart wearable devices and high-speed era is proposed in this paper. This work reduces propagation delay and sub-threshold leakage current using RPES technique with a power supply of 0.9V. The performance and power delay product (PDP) of 6T, 8T and 10T SRAM cells is analysed for CNTFET based RPES technique at 45nm technology. Simulated results using Stanford CNTFET model shows improvement in PDP of proposed 6T SRAM cell by 66% compared to Conv6T and 27% compared to Ternary 4TSTI 6T SRAM. Conv 8T and Diff 8T are implemented using RPES technique which shows improvement by 40.9% and 74.3% respectively. Among SE10T and Diff 10T topologies, Diff 10T has better PDP when implemented using RPES technique. All SRAM cells mentioned are analyzed for various high-k dielectric materials, oxide thickness and pitch values of CNTFET and best fitting results are proposed for SRAM cells. [ABSTRACT FROM AUTHOR]

The traditional low delay transmission model of Internet of things has the problem of high packet loss rate, so a low delay transmission model of Internet of things based on data spectrum is designed. Firstly, the data preprocessing of the Internet of things mainly includes data fusion, data compression and data filtering, then the trust model is established, and finally the task transmission link model of the Internet of things is constructed to realize the low delay transmission of the Internet of things. The experimental results show that the low delay transmission model of IOT based on data spectrum has lower packet loss rate, higher network throughput and higher network resource utilization than the traditional model. [ABSTRACT FROM AUTHOR]

With the development of Internet of Things (IoT), real-time decision making has gradually become one of the important characteristics in mobile edge computing (MEC) environment of IoT. Therefore, in the Integrated Circuit (IC) design of MEC environment for IoT, low delay is one of the important optimization objectives. In the many routing competitions, wirelength, overflow, and runtime are the main evaluation standards, so how to reduce wirelength, overflow, and runtime has become a major challenge. However, the existing work lacks the excellent optimization ability in wirelength, overflow, and runtime, or only considers some of the optimization objectives. Therefore, we consider the wirelength, overflow, and runtime as the optimization objectives and propose a high-quality global routing algorithm of IC design in MEC environment, including the following effective strategies: (1) A hybrid topology optimization strategy combining Prim algorithm and divide-and-conquer method, (2) a heuristic search algorithm considering the congestion and the wirelength of nets. Due to the use of the Fast Lookup Table (FLUTE) algorithm to construct the topology of each net, there are too many Steiner points. For this reason, we used Prim algorithm and divide-and-conquer method to construct the topology, and thus it can avoid the problem of redundant Steiner points. In addition, we propose a congestion area identification method based on interval division to determine the area and order of nets to rip-up and reroute (R&R). Furthermore, a heuristic search algorithm that considers both the congestion and the wirelength of nets is used to optimize the total wirelength in the R&R stage. In terms of the total overflow, the total wirelength and the runtime, the experimental results show that the proposed strategies have achieved effective optimization, which can better satisfy the demand of low delay of IC design for data processing in MEC environments of IoT. [ABSTRACT FROM AUTHOR]

The 5th generation (5G) mobile communication system demands low delay and high user rate of experience for mobile data services, which contradicts with the explosive growth of global mobile data traffic. The explosive growth of data traffic brings serious burden of backhaul links and deteriorates the performance of backhaul delay, and the performance of backhaul delay determines the user rate of experience and average downloading delay of users to a great extent. Cooperative content caching and delivery technique in edge caching entities is an effective method to solve the above problems. This paper proposes an extensive cooperative content caching and delivery scheme based on multicast for device-to-device(D2D)-enabled heterogeneous cellular networks (HetNets). We firstly design an extensive cooperative content caching ( ${E}{C^{3}}$ ) scheme for D2D-enabled HetNets, which does not only consider the cooperative caching among D2D user, small base station (SBS) and macro base station (MBS) levels, but also considers the cooperative caching within each level. Moreover, our proposed ${E}{C^{3}}$ scheme also considers the influence of the backhaul links and remote server caching for cooperative caching. By introducing a content request probability (CRP) for each user predicted by context information, the ${E}{C^{3}}$ is formulated as an integer linear programming (ILP) problem. A hybrid genetic algorithm (HGA) is proposed for solving the problem, which combines genetic algorithm (GA), simulated annealing algorithm (SA) and local content request probability priority algorithm (LCRPPA). Furthermore, we design a scheme of content delivery based on multicast (CDBM), which is solved by a suboptimal edge priority algorithm based on multicast (EPABM). Simulation results show that the proposed extensive cooperative content caching and delivery scheme based on multicast can significantly improve the system performance compared with the existing cooperative content caching and delivery schemes.

Latches areused extensivelyin digital circuits; however, as technology scaling reaches nanometric feature sizes, externally induced phenomena (such as radiation strikes in aerospace applications) may cause a single event upset (SEU) in either single or double nodes. Rather than masking, mitigation of an SEU is effectively achieved by recovering the correct value throughthe design of hardened latches. Using the polarity of the radiation-induced voltage pulse, a stacked design is proposed; this circuit permits to accomplish protection and SEU recovery at reduced overhead and so at substantially improved performance. The first proposed latch (RH-1) recovers all single node upsets and has an extremely low delay in its operation, because this latch propagates data to the output stage though only a transmission gate. The fast operation of RH-1 is utilized in the second latch (RH-2) proposed in this article. RH-2 consists of two RH-1 modules to guarantee that at least two nodes maintain the latched values under the occurrence of a double node upset. Simulation results are provided; they show that RH-1 (recovering all single node upsets and many double node upsets) has the best delay and power-delay-area product (PDAP, as combined metric) among all considered designs and the second-best area and dynamic power dissipation among the recovering schemes, and meanwhile RH-2 (recovering all double node upsets) has the best dynamic power dissipation and PDAP among all considered designs and the best area and delay among recovering schemes. [ABSTRACT FROM AUTHOR]

The fast and diversified development of Internet services leads to numerous services with differentiated delay tolerance of optical connections set-up are converging in the optical network. Consequently, the average set-up delay of optical connection is increased, which will inevitably bring pressures to optical networks. To solve this problem, a delay aware routing spectrum assignment (RSA) algorithm based on services scheduling in priority queues with dynamic virtual topology construction (QVT-RSA) is proposed. First, the QVT-RSA algorithm reasonably identifies various different services and arranges them in order according to their priority, waiting time and delay tolerance requirements. Then, software defined networks (SDN) controller with multi-threads technology is adopted to innovatively parallel serve the ordered service requests to reduce the average set-up delay of optical connections, which also offset the induced delay caused by services scheduling. The network resource is accurately shared among multi-threads using the proposed mutual exclusive resource utilization model realized by dynamic virtual topology construction. The continuously coloring and usable virtual topology linkage reconfiguration can provide topology resources for service requests and adapt the dynamic transformation among serving, waiting and new arriving service requests. The shortest-path routing and first fit spectrum assignment (SPFF-RSA) algorithm is used as the baseline algorithm. Furthermore, by combining the SPFF-RSA algorithm and partial strategy of our strategy, the QSPFF-RSA and V-RSA algorithms are proposed as baseline algorithms as described in V-B. The simulation experiment results demonstrate that the average optical connections set-up delay of QVT-RSA algorithm is reduced compared with SPFF-RSA and QSPFF-RSA algorithms, and the blocking probability of QVT-RSA algorithm is reduced compared with SPFF-RSA, QSPFF-RSA and VRSA algorithms. The optical connections set-up success probability within delay tolerance about high, medium and low priority services of QVT-RSA algorithm is higher than that of the SPFF-RSA, QSPFF-RSA and VRSA algorithms.

Real-time applications (RTA) are an important use case for IEEE 802.11be, a new amendment to the Wi-Fi standard. This amendment introduces new complicated mechanisms to provide low delay and high reliability for RTA, but many of them are not supported by legacy devices that may be present in future Wi-Fi networks. In contrast, the preliminary channel access (PCA) method is designed to satisfy strict RTA requirements even in the presence of legacy devices and does not require significant changes to the Wi-Fi protocol. However, it significantly reduces the capacity for non-RTA traffic. This paper introduces a Smart PCA method, which improves the performance of all the stations in scenarios with multiple RTA stations. Extensive simulation shows that the Smart PCA method guarantees low delays for intensive RTA traffic in these scenarios. Moreover, it doubles the network capacity for the stations with non-RTA traffic.

SERDES(serial de-serialization) technology has become the mainstream physical layer specification of high-speed interface due to its high transmission rate and strong capacity of resisting disturbance. However, the upper PCS(physical coding sublayer) needs to set elastic buffering, code, encode and do other functions, so the system transmission delay is high. SERDES cannot be directly applied to delay sensitive applications such as processor direct connection. This paper introduces a design of PCS architecture based on synchronous phase compensation buffer(SPCB), which can be applied to delay sensitive SERDES transmission system. This architecture features high throughput and ultra-low latency. With a custom SPCB, the transmission reception path delay is about 10 ns at 32 Gb/s per lane, which is about half of the typical PCS delay in the industry, reaching the level of Intel(QPI) and AMD(HT) interface. This PCS architecture can be realized through 28 nm/16 nm/7 nm chip manufacturing tech, and has been applied to a variety of domestic processor.

Due to the nature of holoscopic 3D (H3D) imaging technology, H3D cameras can capture more angular information than their conventional 2D counterparts. This is mainly attributed to the macrolens array which captures the 3D scene with slightly different viewing angles and generates holoscopic elemental images based on fly's eyes imaging concept. However, this advantage comes at the cost of decreasing the spatial resolution in the reconstructed images. On the other hand, the consumer market is looking to find an efficient multiview capturing solution for the commercially available autostereoscopic displays. The autostereoscopic display provides multiple viewers with the ability to simultaneously enjoy a 3D viewing experience without the need for wearing 3D display glasses. This paper proposes a low-delay content adaptation framework for converting a single holoscopic 3D computer-generated image into multiple viewpoint images. Furthermore, it investigates the effects of varying interpolation step sizes on the converted multiview images using the nearest neighbour and bicubic sampling interpolation techniques. In addition, it evaluates the effects of changing the macrolens array size, using the proposed framework, on the perceived visual quality both objectively and subjectively. The experimental work is conducted on computer-generated H3D images with different macrolens sizes. The experimental results show that the proposed content adaptation framework can be used to capture multiple viewpoint images to be visualised on autostereoscopic displays. [ABSTRACT FROM AUTHOR]

Transmission of high-resolution compressed video on unreliable transmission channels with time-varying characteristics such as wireless channels can adversely affect the decoded visual quality at the decoder side. This task becomes more challenging when the video codec computational complexity is an essential factor for low delay video transmission. High-efficiency video coding (H.265|HEVC) standard is the most recent video coding standard produced by ITU-T and ISO/IEC organisations. In this paper, a robust error resilience algorithm is proposed to reduce the impact of erroneous H.265|HEVC bitstream on the perceptual video quality at the decoder side. The proposed work takes into consideration the compatibility of the algorithm implementations with and without feedback channel update. The proposed work identifies and locates the frame's most sensitive areas to errors and encodes them in intra mode. The intra-refresh map is generated at the encoder by utilising a grey projection method. The conducted experimental work includes testing the codec performance with the proposed work in error-free and error-prone conditions. The simulation results demonstrate that the proposed algorithm works effectively at high packet loss rates. These results come at the cost of a slight increase in the encoding bit rate overhead and computational processing time compared with the default HEVC HM16 reference software. [ABSTRACT FROM AUTHOR]

Software-defined networking (SDN) and network function virtualization (NFV) make a network programmable, resulting in a more flexible and agile network. An important and promising application for these two technologies is network security, where they can dynamically chain virtual security functions (VSFs), such as firewalls, intrusion detection systems, and intrusion prevention systems, and thus inspect, monitor, or filter traffic flows in cloud data center networks. In view of the strict delay constraints of security services and the high failure probability of VSFs, we propose the use of a security service chain (SSC) orchestration algorithm that is latency aware with reliability assurance (LARA). This algorithm includes an SSC orchestration module and VSF backup module. We first use a reinforcement learning (RL) based Q-learning algorithm to achieve efficient SSC orchestration and try to reduce the end-to-end delay of services. Then, we measure the importance of the physical nodes carrying the VSF instance and backup VSF according to the node importance of VSF. Extensive simulation results indicate that the LARA algorithm is more effective in reducing delay and ensuring reliability compared with other algorithms.

Abstract Low delay and long lifetime are a very important issue for industrial wireless sensor networks (IWSNs) in which it require long-time monitoring of industrial sites and respond quickly to events that is monitored; therefore, high delay communications can cause serious damage to property and personnel at industrial field. Due to delay, lifetime, and other performance involved to multiple layers, it is difficult to optimize from a single layer. Therefore, a cross-layer design optimal scheme for reducing delay and maximizing lifetime (RDML) scheme is proposed for IWSNs which is from several layers such as transmitted power, duty cycle, and node deployment positions to optimize the network performance of delay and lifetime etc. Firstly, due to the node which sends a packet within a cycle, different duty cycle leads to different selection of the modulation level, resulting in different power consumption efficiency of transmitting data. Through careful analysis, the optimal value of the duty cycle is given which has the lowest energy consumption per bit. In fact, the energy consumption of the node is not balanced. Therefore, an optimization method of changing the duty cycle is proposed. In this paper, larger duty cycle is chosen for nodes with residual energy to improve the reliability of data transmission, reducing the probability of data retransmission, so that the network delay can be reduced in IWSNs. Third, based on the previous analysis, a network optimization deployment algorithm is proposed, which not only maximizes the energy efficiency of a single node but also maximizes the network lifetime and the total network energy efficiency. Both our comprehensive theoretical analysis results indicate that the performance of RDML scheme is better than the previous studies. Relative to equal distance and optimal duty cycle scheme, the RDML scheme can reduce the delay by 19–30% and increase the lifetime by more than 43%.

We propose an autonomous blockchain-based federated learning (BFL) design for privacy-aware and efficient vehicular communication networking, where local on-vehicle machine learning (oVML) model updates are exchanged and verified in a distributed fashion. BFL enables oVML without any centralized training data or coordination by utilizing the consensus mechanism of the blockchain. Relying on a renewal reward approach, we develop a mathematical framework that features the controllable network and BFL parameters (e.g., the retransmission limit, block size, block arrival rate, and the frame sizes) so as to capture their impact on the system-level performance. More importantly, our rigorous analysis of oVML system dynamics quantifies the end-to-end delay with BFL, which provides important insights into deriving optimal block arrival rate by considering communication and consensus delays. We present a variety of numerical and simulation results highlighting various non-trivial findings and insights for adaptive BFL design. In particular, based on analytical results, we minimize the system delay by exploiting the channel dynamics and demonstrate that the proposed idea of tuning the block arrival rate is provably online and capable of driving the system dynamics to the desired operating point. It also identifies the improved dependency on other blockchain parameters for a given set of channel conditions, retransmission limits, and frame sizes. However, a number of challenges (gaps in knowledge) need to be resolved in order to realise these changes. In particular, we identify key bottleneck challenges requiring further investigations, and provide potential future reserach directions. 1 An early version of this work has been accepted for presentation in IEEE WCNC Wksps 2020. [ABSTRACT FROM AUTHOR]

The popularity of delay sensitive applications and high throughput applications in the Internet made the caches of routers and switches larger,resulting in the high latency and high jitter rate of network traffic.With the growth of mobile applications based on the high bandwidth non-response flows,the network bottleneck resource utilization becomes more unbalanced,and the resources distribution of the whole network was difficult to be guaranteed.In order to alleviate these problems,considering the delay control and suppression of high bandwidth non-response flow,an active queue management algorithm focusing on fairness and low delay named FLDA was proposed based on Sample-Match,L-LRU cache and probabilistic packets dropping.Experimental results show that under the interference with high bandwidth non-responsive flows,FLDA can better maintain the queue stability,the fairness of resource utilization of the bottleneck link and the low delay.

Unlike conventional camera captured video (CCV), the screen content video (SCV) is generated by computer, like text, animation, or graphics. The SCV contents are discontinuous, as one abrupt frame is often followed by many static frames. These distinct characteristics bring challenges to the implementation of rate control in screen content coding (SCC). This paper proposes a low delay rate control method for SCC in HEVC (High Efficiency Video Coding). Firstly, a bit allocation scheme considering buffer status and picture complexity is proposed. Then, an R − MAD (Rate-Mean Absolute Difference)model is built to estimate frame QP (quantization parameter) according to allocated bits. Finally, a dynamical adjusting scheme is designed to fix the error of the estimated frame QP. Experimental results show that the proposed method could effectively avoid buffer overflow and improve the coding efficiency over the recommended rate control scheme in HEVC. [ABSTRACT FROM AUTHOR]

For hospital e-health systems, a novel medium access control (MAC) scheme that achieves delay-sensitive healthcare traffic (DSHT) delivery in the uplink direction of wireless local area networks (WLANs) is proposed and investigated. By introducing a slotted request uploading period and informing hubs to upload their transmission requests orderly during the period, overhead cost associated with frequent transmitter/receiver transitions can be reduced and polling empty hubs can be eliminated. Consequently, the proposed scheme results in in-time polling of hubs, thereby optimizing packet queuing delay. Moreover, due to centralized coordination, the proposed scheme avoids contention and back-off. Such an MAC scheme is critical to the Internet of Things (IoT)-based delay-sensitive healthcare applications (DSHAs), such as unmanned patient tending and tele-diagnose/surgery in future e-health systems. Our simulation results show that under a delay constraint of $200~\mu \text{s}$ , the proposed scheme outperforms both the conventional point coordination function (PCF) and distributed coordination function (DCF) schemes in terms of DSHT throughput and has a good DSHT delivery stability performance. [ABSTRACT FROM AUTHOR]

Copyright of Telecommunication Engineering is the property of Telecommunication Engineering and its content may not be copied or emailed to multiple sites or posted to a listserv without the copyright holder's express written permission. However, users may print, download, or email articles for individual use. This abstract may be abridged. No warranty is given about the accuracy of the copy. Users should refer to the original published version of the material for the full abstract. (Copyright applies to all Abstracts.)

A minimal network coding cost and low delay multicast routing (MNCLDMR)of wireless mesh networks was presented. The goal of MNCLDMR was to select the appropriate network coding nodes, mini ize network coding and reduce network delay. MNCLDMR protocol introduces the concept of topology key nodes and network coding key nodes, serving as the routing metric whether the next hop nodes were network coding key nodes or topology key nodes, using MNCLD algorithm construct multicast tree. Simulation results show that MNCLDMR can achieve expectation goal, form reasonable network coding opportunity and achieve mini l network coding and low delay multicast routing.

IEEE 802.15.5 standard introduces the mesh routing which improves reliability and robustness of routing in wireless sensor network since there are multiple routes from source node to destination node. To achieve energy efficiency for a long network lifetime, the asynchronous energy saving is proposed in IEEE 802.15.5, which includes the receiver-initiated unicast mechanism and the sender-initiated broadcast mechanism. In this article, an improved asynchronous energy saving named semi-synchronous energy saving is proposed to deal with the energy inefficiency from idle listening existing in asynchronous energy saving. In semi-synchronous energy saving, every node maintains the wake/sleep schedule information of nodes in its two-hop neighborhood and uses this information to calculate the wake-up time of an interested neighbor that the data will be sent to, which reduces idle listening time in both unicast and broadcast mechanisms. A low delay routing mechanism is also proposed based on the wake/sleep schedule information of neighbors. Furthermore, the optimal guard time to guarantee receiving the wake-up notification from neighbor in the presence of clock drift is investigated for saving energy. The performance analysis and simulation evaluation show that semisynchronous energy saving saves more than 80% of energy with less than 30% memory cost compared to asynchronous energy saving, and it also improves the time of completing broadcast and the end-to-end delay. [ABSTRACT FROM AUTHOR]

Edge computing is proposed to solve the problem of centralized cloud computing caused by a large number of IoT (Internet of Things) devices. The IoT protocols need to be modified according to the edge computing paradigm, where the edge computing devices for analyzing IoT data are distributed to the edge networks. The MQTT (Message Queuing Telemetry Transport) protocol, as a data distribution protocol widely adopted in many international IoT standards, is suitable for cloud computing because it uses a centralized broker to effectively collect and transmit data. However, the standard MQTT may suffer from serious traffic congestion problem on the broker, causing long transfer delays if there are massive IoT devices connected to the broker. In addition, the big data exchange between the IoT devices and the broker decreases network capability of the edge networks. The authors in this paper propose a novel MQTT with a multicast mechanism to minimize data transfer delay and network usage for the massive IoT communications. The proposed MQTT reduces data transfer delays by establishing bidirectional SDN (Software Defined Networking) multicast trees between the publishers and the subscribers by means of bypassing the centralized broker. As a result, it can reduce transmission delay by 65% and network usage by 58% compared with the standard MQTT. [ABSTRACT FROM AUTHOR]

Some new technologies such as Quantum-dot Cellular Automata (QCA) is suggested to solve the physical limits of the Complementary Metal-Oxide Semiconductor (CMOS) technology. The QCA as one of the novel technologies at nanoscale has potential applications in future computers. This technology has some advantages such as minimal size, high speed, low latency, and low power consumption. As a result, it is used for creating all varieties of memory. Counter circuits as one of the important circuits in the digital systems are composed of some latches, which are connected to each other in series and actually they count input pulses in the circuit. On the other hand, the reversible computations are very important because of their ability in reducing energy in nanometer circuits. Improving the energy efficiency, increasing the speed of nanometer circuits, increasing the portability of system, making smaller components of the circuit in a nuclear size and reducing the power consumption are considered as the usage of reversible logic. Therefore, this paper aims to design a two-bit reversible counter that is optimized on the basis of QCA using an improved reversible gate. The proposed reversible structure of 2-bit counter can be increased to 3-bit, 4-bit and more. The advantages of the proposed design have been shown using QCADesigner in terms of the delay in comparison with previous circuits. [ABSTRACT FROM AUTHOR]

Determining the best partitioning structure of a coding tree unit is one of the most time-consuming operations in High Efficiency Video Coding (HEVC) encoding. Specifically, it is the evaluation of the quadtree hierarchy using the rate-distortion (RD) optimization that has the most significant impact on the encoding time, especially in the cases of high definition (HD) and ultra HD videos. In order to expedite the encoding for low-delay applications, this paper proposes a coding unit (CU) size selection and encoding algorithm for inter prediction in the HEVC. To this end, it describes: 1) two CU classification models based on Inter $N\times N$ mode motion features and RD cost thresholds to predict the CU split decision; 2) an online training scheme for dynamic content adaptation; 3) a motion vector reuse mechanism to expedite the motion estimation process; and 4) finally introduces a computational complexity to coding efficiency tradeoff process to enable flexible control of the algorithm. The experimental results reveal that the proposed algorithm achieves a consistent average encoding time performance ranging from 55%–58% and 57%–61% with average Bjøntegaard delta bit rate increases of 1.93%–2.26% and 2.14%–2.33% compared with the HEVC 16.0 reference software for the low delay P and low delay B configurations, respectively, across a wide range of content types and bit rates. [ABSTRACT FROM PUBLISHER]

These protocols have not satisfied the emergent needs of the increasing real-time businesses and high-level ser-vice quality. In order to satisfy the requirement for real-time transmission of high broadband service in cognitive radio networks, a low-delay spectrum access scheme of MAC layer, LD-SAS, was proposed. In spectrum sensing phase, the transmission delay can be minimized by choosing the optimum available channel number of sensing channels. In channel access contention phase, the effect of channel conflict problem and deaf terminal problem in multichannel coordination can be reduced by designing channel access frame. The theoretical and experimental results were presented to demonstrate the effectiveness of our proposed protocol. Compared with the traditional MAC protocols for cognitive networks, LD-SAS has shorter delay time and slightly better throughput performance when the probability of channel being idle is bigger.

Video-streaming events such as virtual classrooms and video conferences require a low delay between sender and receiver. In order to achieve this requirement, and to make full use of the bandwidth capacity of each receiver, each client can be provided with a personalized bitstream of which the bit rate is continuously adapted to his current network bandwidth capacity. However, such an approach requires an excessive amount of computationally complex video encoders. Therefore, this paper proposes an architecture based on coding information calculation (CIC) modules and residual encoder (RE) modules. The CIC modules calculate coding information for the video at certain bit rates whereas the RE modules use this information to skip all encoding steps of a traditional encoder, except for the encoding of the residual. By reducing the amount of bits used to encode the residual, the RE modules can then provide bitstreams with personalized bit rates for several users at the same time. Each CIC module has approximately the same computational complexity as a traditional encoder, whereas an RE module has the approximate complexity of a decoder. The proposed architecture was evaluated for the high efficiency video coding standard, showing that the system achieves its goal of drastically reducing the computational complexity of low-delay live-streaming with many participants and suggesting that using less than six CIC modules results in the best tradeoff between compression efficiency and computational complexity. [ABSTRACT FROM PUBLISHER]

High transmission reliability, energy efficiency, and long lifetime are pivotal issues for wireless body area networks (WBANs). However, these performance metrics are not independent of each other, making it hard to obtain overall improvements through optimizing one single aspect. Therefore, a Cross Layer Design Optimal (CLDO) scheme is proposed to simultaneously optimize transmission reliability, energy efficiency, and lifetime of WBANs from several layers. Firstly, due to the fact that the transmission power of nodes directly influences the reliability of links, the optimized transmission power of different nodes is deduced, which is able to maximize energy efficiency in theory under the premise that requirements on delay and jitter are fulfilled. Secondly, a relay decision algorithm is proposed to choose optimized relay nodes. Using this algorithm, nodes will choose relay nodes that ensure a balance of network energy consumption, provided that all nodes transmit with optimized transmission power and the same packet size. Thirdly, the energy consumption of nodes is still unbalanced even with optimized transmission power because of their different locations in the topology of the network. In addition, packet size also has an impact on final performance metrics. Therefore, a synthesized cross layer method for optimization is proposed. With this method, the transmission power of nodes with more residual energy will be enhanced while suitable packet size is determined for different links in the network, leading to further improvements in the WBAN system. Both our comprehensive theoretical analysis and experimental results indicate that the performance of our proposed scheme is better than reported in previous studies. Relative to the relay selection and power control game (RSPCG) scheme, the CLDO scheme can enhance transmission reliability by more than 44.6% and prolong the lifetime by as much as 33.2%. [ABSTRACT FROM AUTHOR]

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