215 results on '"Mandal, Chittaranjan"'
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2. Exploring the Scope of Unconstrained Via Minimization by Recursive Floorplan Bipartitioning
3. Early Routability Assessment in VLSI Floorplans: A Generalized Routing Model
4. STAIRoute: Early Global Routing using Monotone Staircases for Congestion Reduction
5. Parameter estimation for the oral minimal model and parameter distinctions between obese and non-obese type 2 diabetes
6. DigiLoCS: A Leap Forward in Predictive Organ-on-Chip Simulations
7. Web-Based Course Management and Web Services
8. SamaTulyata: An Efficient Path Based Equivalence Checking Tool
9. An Equivalence Checking Framework for Array-Intensive Programs
10. Equivalence checking of Petri net models of programs using static and dynamic cut-points
11. Refresh re-use based transparent test for detection of in-field permanent faults in DRAMs
12. Energy-Aware Service Allocation: A Crow Search-Based Approach
13. Distributed construction of minimum Connected Dominating Set in wireless sensor network using two-hop information
14. High-Level Modeling and Design Techniques
15. Advanced Effects of Scaled MOS Transistors
16. Process Variability and Reliability of Nano-Scale CMOS Analog Circuits
17. Performance and Feasibility Model Generation Using Learning-Based Approach
18. Circuit Sizing and Specification Translation
19. Introduction
20. Modeling of Scaled MOS Transistor for VLSI Circuit Simulation
21. Establishing Equivalence of Expressions: An Automated Evaluator Designer’s Perspective
22. SeamFlow: Seamless Flow Forwarding in Energy Harvesting-Enabled Access Points of SDWLAN
23. Sustainable Maintenance of Connected Dominating Set by Solar Energy Harvesting for IoT Networks
24. Construction of minimum connected dominating set in wireless sensor networks using pseudo dominating set
25. ETHoS: Energy-Aware Traffic Engineering for Sustainable Hybrid SDN
26. SCOPE: Cost-Efficient QoS-Aware Switch and Controller Placement in Hybrid SDN
27. COLDVL: a virtual laboratory tool with novel features to support learning in logic design and computer organisation
28. Deriving bisimulation relations from path based equivalence checkers
29. Workload Driven Power Domain Partitioning
30. Translation Validation for PRES+ Models of Parallel Behaviours via an FSMD Equivalence Checker
31. A Faster Hierarchical Balanced Bipartitioner for VLSI Floorplans Using Monotone Staircase Cuts
32. IEEE 802.11k-Based Lightweight, Distributed, and Cooperative Access Point Coverage Estimation Scheme in IoT Networks
33. Connected Dominating Set in Wireless Sensor Network
34. SamaTulyata: An Efficient Path Based Equivalence Checking Tool
35. An Equivalence Checking Framework for Array-Intensive Programs
36. A System for Automatic Evaluation of Programs for Correctness and Performance
37. Automatic Detection of Human Fall in Video
38. Distinct pathoclinical clusters among patients with uncontrolled type 2 diabetes: results from a prospective study in rural India
39. Clustering Based Parameter Estimation of Thyroid Hormone Pathway
40. Automatic Generation of Route Control Chart From Validated Signal Interlocking Plan
41. Establishing Equivalence of Expressions: An Automated Evaluator Designer’s Perspective
42. An automated high-level topology generation procedure for continuous-time ΣΔ modulator
43. DART: Data Plane Load Reduction for Traffic Flow Migration in SDN
44. CORE: Prediction-Based Control Plane Load Reduction in Software-Defined IoT Networks
45. Minimum connected dominating set using a collaborative cover heuristic for ad hoc sensor networks
46. A fast exploration procedure for analog high-level specification translation
47. An equivalence-checking method for scheduling verification in high-level synthesis
48. Secure Path Balanced BDD-Based Pre-Charge Logic for Masking
49. Translation Validation for PRES+ Models of Parallel Behaviours via an FSMD Equivalence Checker
50. Workload Driven Power Domain Partitioning
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