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In this work, we present a systematic study of the effect of the stoichiometry of BaTiO3 (BTO) films grown on the Ge(001) substrate by molecular-beam-epitaxy using different characterization methods relying on beam diffraction, including reflection high-energy electron diffraction (RHEED), X-ray diffraction (XRD), and selected-area electron diffraction in transmission electron microscopy. Surprisingly, over a wide range of [Ba]/[Ti] ratios, as measured by the Rutherford backscattering spectrometry, all the BTO layers exhibit the same epitaxial relationship h100iBTO(001)// 〈110〉Ge(001) with the substrate, describing a 45° lattice rotation of the BTO lattice with respect to the Ge lattice. However, varying the [Ba]/[Ti] ratio does change the diffraction behavior. From RHEED patterns, we can derive that excessive [Ba] and [Ti] generate twinning planes and a rougher surface in the non-stoichiometric BTO layers. XRD allows us to follow the evolution of the lattice constants as a function of the [Ba]/[Ti] ratio, providing an option for tuning the tetragonality of the BTO layer. In addition, we found that the intensity ratio of the 3 lowest-order Bragg peaks I(001)/ I(002), I(101)/I(002), and I(111)/I(002) derived from ω-2θ scans characteristically depend on the BTO stoichiometry. To explain the relation between observed diffraction patterns and the stoichiometry of the BTO films, we propose a model based on diffraction theory explaining how excess [Ba] or [Ti] in the layer influences the diffraction response. [ABSTRACT FROM AUTHOR]

We use an improved AC conductance method and a modified Gray-Brown method to study fast interface traps and slow border traps in Ge-based MOS capacitors. The combined methods provide the corrected Fermi energy level (E) versus gate voltage (Vg) relationship, even in samples with high densities of traps that cause significant C-V distortion, the energy distribution of interface traps, their capture cross sections (σ), as well as slow border traps. A wide range of σ's in p-type Ge is found, indicating that there is more than one type of interface trap near the Ge valence band edge. In contrast, a constant σ near the Ge conduction band edge is observed in n-type Ge. XPS results indicate that Ge suboxides near the interface are accountable for the detected slow border traps. [ABSTRACT FROM AUTHOR]

Highlights • The epitaxial S-K InAs/InP(0 0 1) growth is impacted by As/P exchange process. • Two transitions have been observed in S-K InAs/InP(0 0 1) growth (three regimes). • Three regimes are: 2D layer, large 3D islands, and quantum dots growth. • The truncated pyramidal large 3D islands transform into spherical cap quantum dots. • All experimental transitions are explained through thermodynamic modeling. Abstract Quantum Dots (QDs) are considered as an efficient building block of many optoelectronic applications, such as semiconductor laser, photodetector, whereby their physical dimension is the key parameter to be controlled. In this work, we have studied experimentally the growth of InAs QDs on InP(0 0 1) substrate by MOVPE and established a theoretical model explaining the observed epitaxial behaviour. In variance with the classical Stranski-Krastanov growth, we show that during the growth there is an intermediate stage whereby although first large 3D islands are formed, an increased density of small QDs is formed concurrent with the shrinkage of the large 3D islands. As a result, the growth can be divided into three regimes: 2D layer growth, large 3D islands growth and QDs growth. To explain this evolution, a thermodynamic model has been developed accounting for the process driven by surface energy, elastic relaxation energy and inter-island interaction energy. It will be shown that the balance between the surface energy and the elastic relaxation energy provides the transition from 2D layer to large 3D islands (around at 3 ML of InAs growth). This model also supports the energetically favourable truncated pyramidal shape for large 3D islands and the spherical cap shape for QDs. We show in this paper that a balance between surface energy, elastic relaxation energy and inter-island elastic interaction explains the volume shrinkage of the early large 3D islands towards the formation of small QDs in high density. [ABSTRACT FROM AUTHOR]

In this paper we review the details and results of the replacement fin process technique used to successfully demonstrate InGaAs based channel devices from FinFets to ultra scaled nanowires on 300 mm Si substrates. For FinFet devices a Mg p-type doping solution was developed to counteract the unintentional n-type doping of the InP buffer layer which resulted in high source-drain leakage. However, the performance of these devices is found to be limited by the Mg doping as the mobility is degraded. By switching to a GAA architecture the problem of source-leakage through the InP buffer is effectively eliminated and best devices with L G = 60 nm have a peak transconductance of 1030 μS/μm with a SS SAT of 125 mV/dec are achieved. A comparison of gate first to gate last processing highlights the importance of using a low thermal budget process to maintain the integrity of the InGaAs/high- k interface. Nanowires with a diameter of 6 nm were demonstrated to show quantization induced immunity to D it resulting in a SS SAT as low as 66 mV/dec for 85 nm L G devices. [ABSTRACT FROM AUTHOR]

Vertical InAs nanowires (NWs) grown on a Si substrate are promising building-blocks for next generation vertical gate-all-around transistor fabrication. We investigate the initial stage of InAs NW selective area epitaxy (SAE) on a patterned Si (111) substrate with a focus on the interfacial structures. The direct epitaxy of InAs NWs on a clean Si (111) surface is found to be challenging. The yield of vertical InAs NWs is low, as the SAE is accompanied by high proportions of empty holes, inclined NWs, and irregular blocks. In contrast, it is improved when the NW contains gallium, and the yield of vertical InxGa1-xAs NWs increased with higher Ga content. Meanwhile, unintentional Ga surface contamination on a patterned Si substrate induces high yield vertical InAs NW SAE, which is attributed to a GaAs-like seeding layer formed at the InAs/Si interface. The role of Ga played in the III-V NW nucleation on Si is further discussed. It stabilizes the B-polarity on a non-polar Si (111) surface and enhances the nucleation. Therefore, gallium incorporation on a Si surface is identified as an important enabler for vertical InAs NW growth. A new method for high yield (>99%) vertical InAs NW SAE on Si using an InGaAs nucleation layer is proposed based on this study. [ABSTRACT FROM AUTHOR]

In0.53Ga0.47As p + n diodes with different densities of extended defects have been analyzed by detailed structural and electrical characterization. The defects have been introduced during Metal-Organic Vapor Phase Epitaxy (MOVPE) growth by using a lattice-mismatched layer on a semi-insulating InP or GaAs substrate. The residual strain and indium content in the n-type In0.53Ga0.47As layer have been determined by high-resolution X-ray diffraction, showing nearly zero strain and a fixed indium ratio of 0.53. The deep levels in the layer have been characterized by Deep Level Transient Spectroscopy. The mean value of electron traps at 0.17 ± 0.03 eV below the conduction band minimum EC is assigned to the "localized" states of α 60° misfit dislocations; another broad electron trap with mean activation energies between EC− 0.17 ± 0.01 and 0.39 ± 0.04 eV, is identified as threading dislocation segments with "band-like" states. A high variation of the pre-exponential factor KT by 7 orders of magnitude is found for the latter when changing the filling pulse time, which can be explained by the coexistence of acceptor-like and donor-like states in the core of split dislocations in III-V materials. Furthermore, two hole traps at EV+ 0.42 ± 0.01 and EV+ 0.26 ± 0.13 eV are related to the double acceptor of the Ga(In) vacancy (VGa/In3-/2-) and 60° β misfit dislocations, respectively. Finally, the dislocation climbing mechanism and the evolution of the antisite defects AsGa/In are discussed for n-type In0.53Ga0.47As. [ABSTRACT FROM AUTHOR]

In this study, we investigate the changes in the crystalline structure of MBE-deposited SrTiO3 layers on Si with different deviations from Sr/Ti stoichiometry as deposited but also after annealing at high temperatures (>600 °C). We show that as-grown 15 nm thick non-stochiometric SrTiO3 layers present surprisingly lower FWHM values of the (002) omega diffraction peak compared to fully stoichiometric layers of similar thickness. This can misleadingly point to superior crystalline quality of such non-stochiometric layers. However, thermal post-deposition anneals of these layers at temperatures up to 850 °C in oxygen show strong detrimental effects on the crystalline structure, surface and interface with the Si (001) substrate. On the contrary, the post-deposition anneals applied to the stoichiometric samples strongly improve the physical, optical and electrical properties of the epitaxial SrTiO3 thin films. [ABSTRACT FROM AUTHOR]

We investigate differential evolution optimization to fit Rutherford backscattering data. The algorithm helps to find, with very high precision, the sample composition profile that best fits the experimental spectra. The capabilities of the algorithm are first demonstrated with the analysis of synthetic Rutherford backscattering spectra. The use of synthetic spectra highlights the achievable precision, through which it becomes possible to differentiate between the counting statistical uncertainty of the spectra and the fitting error. Finally, the capability of the algorithm to analyze large sets of experimental spectra is demonstrated with the analysis of the position-dependent composition of a Sr x Ti y O z layer on a 200 mm silicon wafer. It is shown that the counting statistical uncertainty as well as the fitting error can be determined, and the reported total analysis uncertainty must cover both. [ABSTRACT FROM AUTHOR]

Barium titanate (BaTiO3 or BTO) is a perovskite structure material with interesting intrinsic properties, such as spontaneous ferroelectricity or electro-optical behavior, which strongly depend on thin film crystallinity. For such functional oxide systems, the pulsed-laser deposition (PLD) approach is one promising growth technique due to its precise stoichiometry control of the metals composing the perovskite crystal and higher oxygen environment compared to the classically used molecular beam epitaxy (MBE) approach. In this article, we demonstrate a BTO epitaxial layer by PLD onto an Si(001) substrate thanks to a thin pseudomorphic SrTiO3 buffer layer grown by MBE. In our study, the various investigated PLD parameters show strong impacts on the BTO polarization orientation. Hence, adjusting the growth conditions allows control of the polarization orientation, which is crucial for both electronic and optical applications. In addition, lattice parameter changes of BTO layers are investigated using x-ray diffraction and cross-sectional transmission electron microscopy, which evidenced a correlation between mismatch relaxation and oxygen growth pressure. Finally, with the analysis of BTO C–V curves, the polarization direction transition is demonstrated electrically. [ABSTRACT FROM AUTHOR]

Herein, the carrier lifetime in ≈5 × 1016 cm−3 n‐doped InxGa1−xAs layers is studied by diode current–voltage analysis and by time‐resolved photoluminescence. Two sets of hetero‐epitaxial layers are grown on semi‐insulating InP or GaAs substrates. The first set corresponds with a constant In content p + n stack, while the second set has a fixed x = 0.53 for the n‐layer, while containing various extended defect densities by using a strain relaxed buffer with different x. This results in threading dislocation densities (TDDs) between ≈105 cm−2 and a few 109 cm−2. It is shown that the overall trend of the recombination lifetime versus TDD can be described by a first‐order model considering a finite recombination lifetime value inside a dislocation core of 1 nm. For the generation lifetime, a strong electric‐field enhancement factor is found. Also, the residual strain in the n‐layer has an impact. Overall, the safe limit for TDD depends on the type of application and on the operation conditions (reverse diode bias). [ABSTRACT FROM AUTHOR]

Metrology for structural and electrical analyses at device level has been identified as one of the major challenges to be resolved for the sub-14 nm technology nodes. In these advanced nodes, new high mobility semiconductors, such as III–V compounds, are grown in narrow trenches on a Si substrate. Probing the nature of the defects, the defect density, and the role of processing steps on the surface of such structures are prime metrology requirements. In order to enable defect analysis on a (III–V) surface, a proper sample preparation for oxide removal is of primary importance. In this work, the effectiveness of different chemical cleanings and thermal annealing procedures is investigated on both blanket InP and oxide embedded InP trenches by means of scanning probe microscopy techniques. It is found that the most effective approach is a combination of an HCl-based chemical cleaning combined with a low-temperature thermal annealing leading to an oxide free surface with atomically flat areas. Scanning tunneling microscopy (STM) has been the preferred method for such investigations on blanket films due to its intrinsic sub-nm spatial resolution. However, its application on oxide embedded structures is non-trivial. To perform STM on the trenches of interest (generally <20 nm wide), we propose a combination of non-contact atomic force microscopy and STM using the same conductive atomic force microscopy tip Our results prove that with these procedures, it is possible to perform STM in narrow InP trenches showing stacking faults and surface reconstruction. Significant differences in terms of roughness and terrace formation are also observed between the blanket and the oxide embedded InP. [ABSTRACT FROM AUTHOR]

• Encapsulation of S-K grown InAs QDs on InP(0 0 1) substrate by InP material. • Preservation of InAs QDs after the InP capping. • InAs QDs dimension shrinkage after InP capping by P/As exchange process. • P incorporation in InAs QDs during InP capping process. • 1550 nm emission with significant increase of carrier lifetime from InP capped InAs QDs. The three-dimensional carrier confinement in Quantum Dots (QDs) is the key to achieve superior properties (electronic and optical) compared to the Quantum Well (QWL) for optoelectronic applications, such as semiconductor lasers, photodiodes. After the growth of QDs, the encapsulation is the next crucial step to confine carriers in QDs and achieve the targeted wavelength emission. In this work, we have studied the InP capping of Stranski-Krastanov (S-K) grown InAs QDs on InP(0 0 1) substrate by MOVPE. During the encapsulation, the P/As exchange is a vital process which either transforms the QDs into a 2D layer or reduces QDs' dimensions. This study shows that a control of Phosphorous concentration on the surface during InP capping facilitates to obtain the expected QDs dimension for 1550 nm wavelength. The emitted photoluminescence peak shifts following the preserved average QDs' dimensions. By combining simulation with optical response we have proved the Phosphorous incorporation into the InAs structure (QDs or 2D layer) during the encapsulation step. As expected, the carrier lifetime reveals the superior quality of the preserved QDs in InP barrier compared to the 2D layer. Finally, the reduction of the non-radiative recombination sources, e.g. dangling bonds, by passivation treatment demonstrates a further increment in carrier lifetime. [ABSTRACT FROM AUTHOR]

The efficiency of the ammonium sulfide vapor (ASV) treatment, as opposed to the wet treatment in the liquid ammonium sulfide solution, on the performance improvement of the In0.53Ga0.47As surface-channel as well as InP-capped buried-channel metal-oxide-semiconductor field-effect-transistors (MOSFET) was demonstrated for the first time. MOSFETs were fabricated with either HCl or ASV surface treatments prior to the gate oxide deposition. ASV treatment was found to be very efficient in boosting the drive current of the transistors compared to that of the HCl treatment. It was also found that the ASV treatment leads to a lower border trap density and slightly higher oxide/semiconductor interface defect density compared to that of the HCl treatment. X-ray photoelectron spectroscopy (XPS) studies of In0.53Ga0.47As native oxide regrowth after both surface treatments identified indium sub-oxides as a possible cause of the performance degradation of the HCl treated devices. Based on this work, ASV treatment could be an efficient solution to the passivation of III-V surfaces. [ABSTRACT FROM AUTHOR]

Two-dimensional transition metal dichalcogenide (TMD) semiconductors have risen as an important material class for novel nanoelectronic applications. Molybdenum disulfide (MoS2) is the most representative TMD compound due to its superior stability and attractive properties for (opto-) electronic devices. However, the synthesis of single-crystalline and functional MoS2 across large-area substrates remains crucial for its successful integration in semiconductor industry platforms. Therefore, this work focuses on the study of MoS2 epitaxy via two well-established industry-compatible synthesis methods, promising for the large-area and single-crystalline integration of van der Waals (vdW) materials. These methods are molecular beam epitaxy (MBE) and metalorganic vapor phase epitaxy (MOVPE) and have studied MoS2 quasi-vdW heteroepitaxy on reconstructed sapphire substrates and MoS2 vdW homoepitaxy on exfoliated MoS2 flakes. By examining the MoS2 structural properties using diffraction and spectroscopy techniques, the epitaxial relation and crystal quality are assessed, which reveals insights into the prevalence of inter- and intragrain defects such as grain boundaries and sulfur vacancies. The MBE method yields superior epitaxial MoS2 registry on both sapphire and MoS2 surfaces as compared to MOVPE, although inferior defectivity arises from the typical lower MBE growth temperature and chalcogen partial pressure. Moreover, both synthesis methods generate high densities of twinned MoS2 grain boundaries, which hamper defect-free integration. As a result, this challenging integration might become an important bottleneck for industrial TMD-based applications with a low tolerance for material defects. [ABSTRACT FROM AUTHOR]

Abstract: Extracting plasmon‐induced hot carriers over a metal–semiconductor Schottky barrier enables photodetection below the semiconductor bandgap energy. However, interfacial carrier recombination hinders the efficiency and stability of this process, severely limiting its implementation in telecommunication. This study proposes and demonstrates the use of epitaxially grown lattice‐matched SrTiO3 for interfacial passivation of silicon‐based plasmonic Schottky devices. The devices are activated by an electrical soft‐breakdown of the interfacial SrTiO3 layer, resulting in reproducible rectified Schottky characteristics. The transition to a low resistance state of the SrTiO3 layer boosts the extraction efficiency of hot holes upon resonant plasmonic excitation, giving rise to a two orders of magnitude higher photocurrent compared to devices with a native oxide layer. Photoresponse, tunability, and barrier height studies under reverse biases as high as 100 V present superior stability with the incorporation of the SrTiO3 layer. The investigation paves the way toward plasmon‐induced photodetection for practical applications including those under challenging operating conditions. [ABSTRACT FROM AUTHOR]

Silicon does not emit light efficiently, therefore the integration of other light-emitting materials is highly demanded for silicon photonic integrated circuits. A number of integration approaches have been extensively explored in the past decade. Here, the most recent progress in this field is reviewed, covering the integration approaches of III-V-to-silicon bonding, transfer printing, epitaxial growth and the use of colloidal quantum dots. The basic approaches to create waveguide-coupled on-chip light sources for different application scenarios are discussed, both for silicon and silicon nitride based waveguides. A selection of recent representative device demonstrations is presented, including high speed DFB lasers, ultra-dense comb lasers, short (850nm) and long (2.3μm) wavelength lasers, wide-band LEDs, monolithic O-band lasers and micro-disk lasers operating in the visible. The challenges and opportunities of these approaches are discussed. [ABSTRACT FROM AUTHOR]

Several approaches for growing III-V lasers on silicon were recently demonstrated. Most are not compatible with further integration, however, and rely on thick buffer layers and require special substrates. Recently, we demonstrated a novel approach for growing high quality InP without buffer on standard 001-silicon substrates using a selective growth process compatible with integration. Here we show high quality InGaAs layers can be grown on these InP-templates. High-resolution TEM analysis shows these layers are free of optically active defects. Contrary to InP, the InGaAs material exhibits strong photoluminescence for wavelengths relevant for integration with silicon photonics integrated circuits. Distributed feedback lasers were defined by etching a first order grating in the top surface of the device. Clear laser operation at a single wavelength with strong suppression of side modes was demonstrated. Compared to the previously demonstrated InP lasers 65% threshold reduction is observed. Demonstration of laser arrays with linearly increasing wavelength prove the control of the process and the high quality of the material. This is an important result toward realizing fully integrated photonic ICs on silicon substrates. [ABSTRACT FROM AUTHOR]

• Oxygen exposure amount prior to growth showed large impact on physical properties. • Optimized exposure led to smooth transition from Si to perovskite oxide SrTiO 3. • Over-exposure resulted in SiO x interfacial layer and prevented epitaxy on Si. • Stoichiometry changed with oxygen amount, resulting in shifts in optical constants. • Post-annealing slightly improved k and no absorption in visible wavelength observed. The direct heteroepitaxy of strontium titanate (SrTiO 3 , STO) oxide on Si(0 0 1) substrate is an important step to integrate other functional perovskite oxides onto large scale wafers. In this study, we focused on the SrO interfacial layer in function of molecular oxygen gas exposure amount prior to the STO growth. The various formed interfaces showed large impact on the subsequent STO growth, including crystal quality and stoichiometry. The chemical binding states showed that the formation of thick SiO x interfacial layer was strongly correlated with the molecular oxygen exposure amount. More interestingly, the film stoichiometry is also strongly affected with overexposure, which resulted in optical properties degradation of the STO films. The STO optical constants, extracted from the spectroscopic ellipsometry (SE), exhibit obvious differences between crystalline and amorphous samples. Finally, post-deposition annealing was used to reduce the optical extinction, which is of primary importance for photonic applications. [ABSTRACT FROM AUTHOR]

On-chip optical interconnects stillmiss a high-performance lasermonolithically integrated on silicon. Here, we demonstrate a silicon-integratedInP nanolaser that operates at room temperature with a low thresholdof 1.69 pJ and a large spontaneous emission factor of 0.04. An epitaxialscheme to grow relatively thick InP nanowires on (001) silicon isdeveloped. The zincblende/wurtzite crystal phase polytypism and theformed type II heterostructures are found to promote lasing over awide wavelength range. [ABSTRACT FROM AUTHOR]

• Encapsulation of S-K grown InAs QDs on InP(0 0 1) substrate by InAlGaAs material. • No defect observed inside InAs QDs, at the interfaces, and in the capping layer. • A change in strain distribution observed in InAs QDs after InAlGaAs capping. • InAs QDs' photoluminescence intensity varies in function of capping layer thickness. • A two-step Non-uniform model explains the InAlGaAs capping process of InAs QDs. Stranski-Krastanow (S-K) grown self-assembled quantum dots (QDs) are considered as an efficient active layer for many optoelectronic applications, such as semiconductor laser, photodetector, due to the possibility to confine carriers in three dimensions. Towards the device application, the subsequent growth of an encapsulation layer is a key step to obtain the desired QDs-based heterostructures. In this work, we have studied step-by-step the encapsulation process of S-K grown InAs QDs/InP(0 0 1) by InAlGaAs (lattice matched to InP) in MOVPE. A detailed investigation with Electron Channeling Contrast Imaging (ECCI) and cross-sectional Transmission Electron Microscopy (TEM), indicated that after the InAlGaAs capping the partially relaxed, dome shaped InAs QDs are transformed into fully biaxially strained, truncated pyramids however without introducing any defects in the heterostructure. The study also presents the important role of the capping layer thickness on the QDs photoluminescence efficiency. The gradual change of the surface morphology during the encapsulation process, has been investigated step-by-step in-depth by atomic force microscopy. The morphological changes can be explained by a capping model based on the localized growth rates. We show that two growth steps of Non-uniform capping, where growth rates are different from each other, result in the successful planarization of the InAlGaAs capping without forming any defect. [ABSTRACT FROM AUTHOR]

The observation and interpretation of Frank stacking faults, Shockley stacking faults, Lomer dislocations, and 60° misfit dislocations, which have similar line shapes in the (001) In0.53Ga0.47As crystalline surface, are performed with the electron channeling contrast imaging (ECCI) technique. To minimize the backscattered electron (BSE) contrast that resulted from the surface morphology, a relatively flat region is first selected and compared with an atomic force microscopy (AFM) image and then, subsequently, examining ECCI with transmission electron microscopy (TEM)‐like invisibility criteria. By orthogonally choosing the diffraction vector g between (220) and (2‐20), misfit dislocations seem to be always visible but partially faint in the g parallel to the line direction on the surface. With respect to the image contrast, Frank stacking faults and Lomer dislocations are likely to be completely invisible for parallel g. The criteria are further confirmed by cross‐sectional TEM analysis, which shows a preferred homogeneous surface nucleation. [ABSTRACT FROM AUTHOR]