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Following the recently proposed $\theta$ -converter that reduces voltage ripples, leakage currents, and total capacitance required in a single-phase converter, this paper further improves the $\theta$ -converter by reducing the current stress of the neutral inductor, by relocating it to the dc side without affecting the other functions of the $\theta$-converter. Based on the average circuit model of the proposed converter, it is found that the current flowing through the neutral inductor can be reduced by at least three times, and hence, the size of the inductor can be reduced by at least nine times. How to operate the converter to achieve the reduction of the current stress is discussed in detail. Moreover, the selection criteria on the neutral inductor and other passive components used in the proposed converter are discussed in order to minimize their usage. Intensive experimental results are presented to demonstrate that the proposed converter can indeed reduce the current-stress while the other functions of the $\theta$-converter are not affected. [ABSTRACT FROM AUTHOR]

Isolation transformers and bulky electrolytic capacitors are often used in power electronic converters to reduce leakage currents and voltage ripples but this leads to low power density and reduced reliability. In this paper, an auxiliary capacitor is added to the widely used conventional full-bridge converter to provide a path for, and hence significantly reduce, the leakage current. The operation of the full-bridge converter is split into the operation of a half-bridge converter and a dc–dc converter so that the ripple energy can be diverted from the dc-bus capacitor to the auxiliary capacitor. Hence, the dc-bus capacitor can be significantly reduced while maintaining very low voltage ripples on the dc bus because it is only required to filter out switching ripples. The auxiliary capacitor is designed to allow high voltage ripples because its voltage is not supplied to any load. Accordingly, the auxiliary capacitor can also be very small as well. As a result, the total required capacitance becomes very small. The reduction ratio of the total capacitance is significant, which makes it cost-effective to use film capacitors instead of electrolytic capacitors. The proposed converters can be also operated as an inverter without any restriction on power factor because the adopted four switches are all bidirectional in terms of power flow. Experimental results for both rectification and inversion modes are presented to demonstrate the performance of the proposed converter in reducing the ripples, the leakage currents, and the total capacitance needed, with comparison to the conventional bridge converter without the auxiliary capacitor. [ABSTRACT FROM PUBLISHER]

In this paper, a single-phase converter consisting of two legs with four switches, called the $\theta$-converter, is proposed. It has a common ac and dc ground, which reduces common mode currents and removes the need for an isolation transformer, and two capacitors: one across the whole dc bus and the other across the output. The dc bus capacitor provides a direct path for the double-frequency ripple current inherently existing in single-phase converters to return continuously so the output capacitor can be sized very small, only to filter out switching ripples. Moreover, the dc bus capacitor is intentionally designed to store the system ripple energy with large voltage ripples, which reduces its capacitance. Hence, the total capacitance needed and the output voltage ripples are reduced at the same time. This makes it cost-effective to use highly reliable film capacitors instead of bulky and vulnerable electrolytic capacitors. Because of the removed isolation transformers and bulky electrolytic capacitors, the power density and system reliability are improved. In order to properly operate the converter, two independent controllers are designed for the two legs, respectively, to achieve the desired functions and other normal objectives, such as the unity power factor. Experimental results are presented to demonstrate the high performance of the proposed converter. [ABSTRACT FROM AUTHOR]

A single-phase four-switch rectifier with considerably reduced capacitance is investigated in this paper. The rectifier consists of one conventional rectification leg and one neutral leg linked with two capacitors that split the dc bus. The ripple energy in the rectifier is diverted into the lower split capacitor so that the voltage across the upper split capacitor, designed to be the dc output voltage, has very small ripples. The voltage across the lower capacitor is designed to have large ripples on purpose so that the total capacitance needed is significantly reduced and highly reliable film capacitors, instead of electrolytic capacitors, can be used. At the same time, the rectification leg is controlled independently from the neutral leg to regulate the input current to achieve unity power factor and also to maintain the dc-bus voltage. Experimental results are presented to validate the performance of the proposed strategy. [ABSTRACT FROM AUTHOR]

The $LC$ filter at the input of a dc/dc converter may cause instability when the converter is controlled as a constant power load (CPL) and one of the effective solutions is to reduce the output impedance of the $LC$ input filter with different stabilization dampers. In this letter, the impact of these dampers on the $LC$ filter is analyzed with two-port network analysis and it is found that the existing dampers all degrade the performance of the original $LC$ input filter to some extent. In order to overcome this drawback, an $RLC$ damper is proposed to stabilize the whole system while improving the performance of the $LC$ input filter. In addition, this $RLC$ damper is also designed to achieve high robustness against the parameter variations of the $LC$ input filter. Furthermore, in order to avoid the power loss when implementing the damper physically, a control strategy for the CPL is proposed to implement the $RLC$ damper as a virtual $RLC$ ($VRLC$ ) damper. The actual effectiveness of the $VRLC$ damper and its impact on the CPL are fully evaluated via two-port network analysis as well. Finally, experimental results from a 100-W 48–24-V buck converter with an $LC$ input filter are presented to demonstrate the proposed $VRLC$ damper. [ABSTRACT FROM AUTHOR]

A nonlinear controller for single-phase grid-tied inverters, that can operate under both a normal and a faulty grid with guaranteed closed-loop stability, is proposed. The proposed controller acts independently from the system parameters, does not require a phase-locked loop, and can achieve the desired real power regulation and unity power factor operation. Based on nonlinear input-to-state stability theory, it is analytically proven that the inverter current always remains below a given value, even during transients, independently from grid variations or faults (short circuit or voltage sag). The desired performance and stability of the closed-loop system are rigorously proven since the controller has a structure that does not require any switches, additional limiters, or monitoring devices for its implementation. Therefore, nonlinear stability of a grid-tied inverter with a given current-limiting property is proven for both normal and faulty grid conditions. The effectiveness of the proposed approach is experimentally verified under different operating conditions of the grid. [ABSTRACT FROM PUBLISHER]

It has been shown recently that a cascaded dc/dc converter system can be stabilized via amplitude compensation (SAC) or phase compensation (SPC) for the input impedance of the load converter. In this letter, it is shown that the cascaded system when adopting the SAC is unconditionally stable but conditionally stable when adopting the SPC, that is, SAC is more stable than SPC. Then, the comparison is carried out for the parallel-virtual-impedance (PVI) and series-virtual-impedance (SVI) control strategies that are adopted to implement the SAC, and it is found that only the SVI control strategy can achieve the SAC for the whole load and input voltage range of the load converter without limitation. Therefore, SVI is in general better than PVI when realizing SAC. Following on this, an adaptive mechanism is introduced to improve the traditional SVI control strategy so that the load converter can be stably connected to different source converters such as $LC$ input filters and traditional dc/dc converters. Finally, a load converter cascaded with three different source converters is fabricated to validate the effectiveness of the proposed adaptive SVI control strategy. [ABSTRACT FROM AUTHOR]

Connecting converters in cascade is a basic configuration of dc distributed power systems (DPS). The impedance interaction between individually designed converters may make the cascaded system become unstable. The previous presented stabilization approaches not only need to know the information of the regulated converter, but also have to know the characteristics of the other converters in the system, which are contradictory to the modularization characteristic of dc DPS. This letter proposes an adaptive-input-impedance-regulation (AIIR) method, which connects an adaptive virtual impedance in parallel with the input impedance of the load converter, to stabilize the cascaded system. This virtual impedance can adaptively regulate its characteristic for different source converters. Therefore, with the AIIR method, all the load converters can be designed to a fixed standard module to stably adapt various source converters. In addition, at any cases, the AIIR approach only changes the load converter's input impedance in a very small frequency range to keep the load converter's original dynamic performance. The requirements on the AIIR method are derived and the control strategies to achieve the AIIR method are proposed. Finally, considering the worst stability problem that often occurs at the system whose source converter is an LC filter, a load converter cascaded with two different LC input filters is fabricated and tested to validate the effectiveness of the proposed AIIR control method. [ABSTRACT FROM PUBLISHER]

Bulky electrolytic capacitors, which are often needed in dc systems to filter out voltage ripples, considerably reduce power density and system reliability. In this paper, a ripple eliminator, which is a bidirectional buck–boost converter terminated with an auxiliary capacitor, is adopted to replace bulky capacitors in dc systems. The voltage ripples on the terminals (i.e., the dc bus) can be transferred to the auxiliary capacitor, and the ripples on the auxiliary capacitor can vary in a wide range. Moreover, the average voltage of the auxiliary capacitor can be controlled either lower or higher than the dc-bus voltage, which offers a wide operational range for the ripple eliminator and also the possibility of further reducing the auxiliary capacitance. Hence, the total capacitance required can be much smaller than the originally needed. After proposing a control strategy to transfer the voltage ripples to the auxiliary capacitor, three control strategies are proposed to regulate the auxiliary-capacitor voltage to maintain proper operation. Intensive experimental results are presented to demonstrate the performance. [ABSTRACT FROM PUBLISHER]

Back-to-back PWM converters are becoming a realistic alternative to conventional converters in high-power wind power applications. In this paper, a control strategy based on the synchronverter technology is proposed for back-to-back PWM converters. Both converters are run as synchronverters, which are mathematically equivalent to the conventional synchronous generators. The rotor-side converter is responsible for maintaining the DC link voltage and the grid-side converter is responsible for the maximum power point tracking (MPPT). As the two converters are operated using the synchronverter technology, the formed wind power system becomes more friendly to the grid. Extensive real-time digital simulation results are presented to verify the effectiveness of the proposed method under normal operation and grid-fault scenarios. [ABSTRACT FROM AUTHOR]