Search

Background Bladder cancer (BC) is a very common type of malignant cancer in men and new therapeutic strategies are urgently needed to reduce mortality. Several studies have demonstrated that Rhopaloic acid A (RA), a compound isolated from marine sponges, fights cancer but its potential anti-tumor effect on BC is still unknown. Purpose The present study was aimed to explore the potential anti-tumor effects of RA against human BC cells and the underlying molecular mechanism. Methods Cell cytotoxicity was determined using the MTT and colony formation assays. Cell cycle distribution, apoptosis induction and generation of mitochondrial reactive oxygen species (ROS) were analyzed by flow cytometry. Mitochondrial membrane potential, acridine orange staining and intracellular ROS levels were observed using fluorescence microscopy. Levels of various signaling proteins were assessed using Western blotting. Furthermore, a zebrafish BC xenotransplantation model was used to confirm the anti-tumor effect of RA in vivo. Results Treatment with RA significantly suppressed the proliferation of BC cells that resulted from G2/M cycle arrest. Additionally, RA induced mitochondrial-mediated apoptosis and autophagy in BC cells. The death of BC cells induced by RA was rescued by treatment with inhibitors of apoptosis (Z-VAD-FMA) or autophagy (3-MA). RA activated the MAPK pathway and increased the production of cellular and mitochondrial ROS. Treatment with the ROS scavenger N-acetyl cysteine, effectively reversed the induction of apoptosis, autophagy, JNK activation and DNA damage elicited by RA. Finally, RA significantly inhibited tumor growth in a zebrafish BC xenotransplantation model. Conclusion Taken together, our findings indicate that RA induces apoptosis and autophagy and activates the MAPK pathway through ROS-mediated signaling in human BC cells. This RA-induced pathway offers insights into the molecular mechanism of its antitumor effect and shows that RA is a promising candidate for the treatment of BC.

Medical facilities and technologies have been greatly improved through the application of biosensors, healthcare systems, health diagnosis and disease prevention technologies. However, wireless transmission and deep learning neural network are essential applications and new methods in biomedical engineering nowadays. Hence, authors established a new real-time and intelligent healthcare system that will help the physician’s diagnosis over the patient’s condition and will have a great contribution to medical research. Physiological conditions can be monitored and primary diagnosis will be determined which will help people primarily for personal health care. This paper focused on the collection, transmission, and analysis of physiological signals captured from biosensors with the application of deep learning and segmented analysis for the prediction of heart diseases. Biosensors employed were non-invasive composed of infrared body temperature sensor (MLX90614), heart rate and blood oxygen sensor (MAX30100) and ECG sensor (AD8232). This research used these biosensors to collect signals integrated with Arduino UNO as a central module to process and analyze those signals. ESP8266 Wi-Fi microchip was used to transmit digitized result signals to the database for deep learning analysis. The first segment of deep learning analysis is the Long-Short Term Memory (LSTM) network applied for the temperature, heart rate and arterial oxygen saturation prediction. A rolled training technique was used to provide accurate predictions in this segment. The second segment used was the Convolutional Neural Network (CNN), which comprises three hidden layers to analyze the ECG signals from the image datasets. Deep learning tools used were the powerful python language, python based Anaconda, Google’s TensorFlow and open source neural network library Keras. The algorithm was used for evaluation using the available MIT-BIH ECG database from Physionet databases which attained 99.05% accuracy and arrived at only 4.96% loss rate after 30 training steps. The implementation of the system is comprised of physiological parameter sensing system, the wireless transmission system and the deep neural network prediction system. User interfaces were also developed such as the LCD display which shows values of body temperature, heart rate and arterial oxygen saturation level. Web page and app were created to allow users or doctors for visual presentations of the results of analysis. The webpage contains information about the system, deep learning networks used, biosensors and the historical graph of about the patient’s body temperature, heart rate and oxygen saturation. It also indicates the normal ranges of the physiological parameters.

This paper presents a novel design for a double-edge triggered flip-flop (DETFF). A detailed analysis of the transistors used in the DETFF is carried out to determine the critical path. Therefore, the proposed DETFF employs low-V th transistors at critical paths such that the power-delay product as well as the large area consumption caused by the low-V th transistors can be resolved simultaneously. Therefore, the proposed DETFF fully utilizes the multi-V th scheme provided by advanced CMOS processes without suffering from a large area penalty, slow clock frequency, and poor noise immunity. The proposed design is implemented using a typical 0.18-μm 1P6M CMOS process. The measurement results reveal that the proposed DETFF reduce the power-delay product by at lease 25% (i.e., dissipated energy).

A low-cost wet chemical process, viz., the electroless nickel deposition, was successfully developed to produce magnetic nickel−tungsten−phosphorus (NiWP) mesoparticles with diameters ranging from 100 to 500 nm on silica templates of ca. 102 nm and gold templates of ca. 3 nm. An X-ray diffractometer (XRD), transmission electron microscope (TEM), scanning electron microscope (SEM) equipped with an energy-dispersive X-ray spectrometer (EDX), a superconducting quantum interference device (SQUID), and a vibrating sample magnetometer (VSM) were employed to characterize these particles. The averaged sizes of the NiWP particles could be conveniently regulated with the duration of the electroless plating process, in which exponential growth kinetics of the NiWP particles was observed. Both XRD and electrodiffraction (ED) patterns of these NiWP alloys indicate existence of diffraction peaks close to the (111), (200), (220), and (311) reflections of bulk face-centered cubic (fcc) Ni. The zero-field-cooled (ZFC) and...

A low-cost video decoder for NTSC signals is described in this paper. The proposed NTSC video decoder design employs a 2D2L comb filter, and a DDFS (direct digital frequency synthesizer)-based DCO (digital control oscillator) based on a trigonometric quadruple angle formula in a digital PLL to track and lock the demodulation clocks. The complexity of the digital video decoder is consequently drastically reduced. The overall cost of the proposed design is 7.22 mm/sup 2/ (26 K gates). The maximum power dissipation is 109.2 mW at the highest clock rate which is 21.48 MHz.

This paper describes the design of a digital I/Q separator which is applied to DVB-T receivers. The proposed I/Q separator not only avoids problems caused by analog I/Q separators, e.g., gain error, phase error, DC offset, etc., it also resolves the difficulties of prior digital I/Q separators, e.g., large area, large gate count, and high power consumption by insertion of decimation filters. A prototypical system as well as a chip has been designed using 0.18-mum single-poly six-metal CMOS process with core area of 1.59 mm2. The total power consumption is merely 433 muW at a 20.0 MHz system clock.

This paper describes the design and implementation of a sequential access memory (SAM) in the OFDM demodulator of DVB-T receivers. The SAM decoder is based upon a ring counter to reduce the transistor count as well as the number of transitions per memory access. The SAM cell takes advantage of a negative word-line scheme to minimize the leakage current of the cell access transistors. The power consumption of memory access is then reduced. A 2-Kb SAM is carried out by 0.18 mum 1P6M CMOS process to verify the proposed design. The average power dissipation of the address decoder is 41.97 muW, while the average power dissipation of the overall SAM is 4.11 mW given a 20 MHz clock rate