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Cascode loads are commonly assumed to be frequency independent nevertheless: it is shown that cascode loads introduce a pole-zero pair into the amplifier's frequency response. Unfortunately, when designing high-gain high-speed amplifiers based on “all NMOS signal path” concepts, the pole-zero pair introduced by the PMOS cascode is likely to be located near the amplifier's closed-loop bandwidth. Unlike pole-zero pairs located far from the amplifier's closed-loop bandwidth, the effect of pole-zero pairs located near the amplifier's closed-loop bandwidth is highly dependent on the exact configuration of the amplifier. While not always possible, minimizing the capacitance on the cascode node minimizes the effects of this undesirable pole-zero pair. [ABSTRACT FROM PUBLISHER]