Search

The effect of decreasing Drain-Induced Barrier Lowering (DIBL) is one of the non-desirable short-channel effects in the MOSFETs family, which causes the threshold voltage of the transistor to be reduced by increasing the voltage of the drain. This effect makes it impossible for circuit designers to consider VT as a constant value, and hence, it is necessary to calculate VT as a function of the drain voltage. Therefore, to consider the effect of DIBL in the design of integrated circuits, a large computational burden is imposed on the system, which slows down the simulation process in circuit-level simulators, particularly when a large number of transistors are to be simulated. Accordingly, in this paper, a multiple input single output (MISO) Nonlinear Autoregressive (N-AR) model using the Gram-Schmidt orthogonalization approach is proposed, that calculates the threshold voltage of the new generation of MOSFETs, i.e., Junctionless Double-Gate MOSFETs (JL-DG-MOSFETs), with a high precision and a significant speed-up in the computational procedure of the model. It is shown that, on average, the proposed numerical method is 313 times faster than the state-of-the-art analytical model. The calculated percentage of normalized mean square error between the proposed model and analytical one is 0.435% on average, showing that the proposed approach can be a fast and accurate candidate for replacing the analytical modeling.