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Ladder network synthesis is very significant for winding fault diagnosis within transformer. To synthesize the network reversely based on the measurable frequency response analysis (FRA) data is the only applicable way. To date the iron core and non-tested winding, which result in the frequency-dependent network components and multiple ladders in some frequency ranges, are usually not considered in the reverse process and thus the synthesis precision is largely limited. This paper proposes to synthesize multiple ladder networks in different frequency regions to handle this problem. Firstly, the sensitivities and frequency-dependent features of network components are analyzed, based on which the topology and components of the networks in diverse frequency ranges are determined afterwards. Further, the network synthesis strategies in different frequency ranges are elaborately designed. Finally, the synthesis method is applied on a distribution transformer successfully, with the fact that the extracted network parameters meet all the constraints and its FRA curve matches well with the measured one. An intact method of multiple-network synthesis for transformer winding in wide frequency range, considering the iron core and non-tested winding, is offered in this paper.

Heat-integrated water network synthesis (HIWNS) has received considerable attention for the advantages of reducing water and energy consumptions. HIWNS is effective in water and energy sustainability. Mixed integer non-linear programming (MINLP) is usually applied in HIWNS. In this work, a novel nonlinear programming (NLP) was proposed for HIWNS by considering wastewater reuse and wastewater regeneration reuse. Integer variables are changed to non-linear equation by the methods for identifying stream roles and denoting the existence of process matches. The model is tested by examples with single and multiple regeneration unit problems. The testing results showed that the NLP is an alternative method for HIWNS with wastewater reuse and regeneration reuse.

This article is concerned with the synthesis problem of passive mechanical admittances that connect masses in a chain. The mass chain is excited at one boundary point, and the admittances are designed to suppress the disturbance independent of the length of the chain. The scalar transfer functions from the disturbance to a given intermass displacement are studied. The disturbance rejection performance is optimised over a class of arbitrary positive real mechanical admittances. The resulting admittance is synthesised mechanically using springs, dampers, and inerters only.

The field of electrical network synthesis has a number of long-standing unanswered questions. The most perplexing concern minimality in the context of resistor, inductor and capacitor (RLC) network synthesis. In particular, the famous Bott–Duffin networks appear highly non-minimal from a system theoretic perspective. We survey some recent developments on this topic. These include results establishing the minimality of the Bott–Duffin networks and their simplifications for realising certain impedances; enumerative approaches to the analysis of RLC networks within given classes of restricted complexity; and new necessary and sufficient conditions for a (not necessarily controllable) system to be passive. Finally, some remaining open questions are discussed.

Determining the optimal operating mode (batch or continuous-flow) for chemical manufacturing remains a pressing open problem. Focusing on reactors, an accurate determination must account for fundam...

This paper presents a simple and systematic approach to determine the equivalent frequencyindependent circuit model for a dual-band planar antenna. The Foster Canonical network synthesis technique with two RLC tanks has been employed to generate the two resonant bands of the antenna. The transfer function model is subsequently refined using a data fitting algorithm (viz the Nelder-Mead simplex algorithm). Parametric adjustments are performed at the final stage in order to further improve the accuracy of the final parameters.

This article solves the minimal realizability problem of a specific biquadratic impedance with double poles and zeros as a three-reactive-element series–parallel network, where the main conclusion shows that any three-reactive seven-element series–parallel network realizing such a specific biquadratic impedance can always be equivalent to a three-reactive six-element series–parallel network (containing three resistors). First, necessary and sufficient conditions are derived for such biquadratic impedances to be realizable as a series–parallel network containing no more than three reactive elements and no more than three resistors, and the corresponding realizability configurations are presented. Then, the main conclusion is presented, which further implies a corollary about the synthesis of three-reactive series–parallel networks containing an arbitrary number of resistors. The results of this article can contribute to the minimal realization problems of network synthesis especially for the biquadratic impedance case, and can be directly utilized in the optimization and design of inerter-based mechanical control systems.

In this study, the design of the class-E M­ power amplifier is presented. In this design, the effects of on-state resistance and non-linear parasitic capacitances of the transistors are investigated. Two metal oxide semiconductor field-effect transistors (MOSFETs) of IRFZ24N and IRF510 with different drain-source resistances are used in the presented circuits. In the given design, the values of the operational frequency and duty ratio are 3.5 MHz and 0.5, respectively. This study shows the importance of considering non-linear parasitic elements of MOSFET, especially drain-source resistance in the designing of the class-E M power amplifiers. It is shown that the class-E M power amplifier with high MOSFET drain-source resistance needs high DC input voltage for both the primary and auxiliary circuits. In the previous works, non-linear on-state resistance and non-linear drain-source and gate-drain capacitances have not been included at the same time in the analyses. Two class-E M amplifiers contain IRF510 and IRFZ24N are designed, simulated, and measured. The efficiency equal to 96.6% with 11.851 W output power at 3.5 MHz and the efficiency equal to 88.4% with 12.361 W output power are achieved for presented class-E M amplifiers contain IRFZ24N and IRF510, respectively.

The P-Graph framework is an efficient tool that deals with the solution of Process Network Synthesis (PNS) problems. The model uses a bipartite graph of material and operating unit nodes, with arcs representing material flow. The framework includes combinatorial algorithms to identify solution structures, and an underlying linear model to be solved by the Accelerated Branch and Bound algorithmic method. An operating unit node in a P-Graph consumes its input materials and produces its products in a fixed ratio of operation volume. This makes it inadequate in modeling such real-world operations where input composition may vary, and may also be subject to specific constraints. Recent works address such cases by directly manipulating the generated mathematical model with linear programming constraints. In this work, a new general method is introduced which allows the modeling of operations with flexible input ratios and linear constraints in general, solely by tools provided by the P-Graph framework itself. This includes representing the operation with ordinary nodes and setting up their properties correctly. We also investigate how our method affects the solution structures for the PNS problem which is crucial for the performance of algorithms in the framework. The method is demonstrated in a case study where sustainable energy generation for a plant is present, and the different types of available biomass introduce a high level of flexibility, while consumption limitations may still apply.

A fixed-width multiplier receives two n-bit operands and generates an approximate n-bit product as the output. It truncates part of the partial products and employs an appropriate error compensation circuit in order to reduce the approximation error. In this study, a new error compensation circuit for the fixed-width multiplier has been proposed which utilises the correction vector (CV) and modified minor CV. The proposed error compensation circuit is capable of minimising both the mean error and the mean-square error. Post-synthesis results for 16-bit of fixed-width multiplier demonstrate that the proposed circuit has 3.50, 39.24, 42.91 and 44.91% reduced delay, area, power consumption and power–delay product when compared with the existing design reported in the literature.

Performance failure due to aging is an increasing concern for RF circuits. While most aging studies are focused on the concept of mean-time-to-failure, for analog circuits, aging results in continuous degradation in performance before it causes catastrophic failures. In this paper, we present a methodology for monitoring and recovering the performance of RF circuits in the field at little or no performance penalty. The proposed technique is based on two phases: During the design time, degradation profiles of the aged circuit are obtained through simulations. From these profiles, we identify reliability hotspots and focus on monitoring these components, and recovering from the effects of their aging. After deployment, an on-chip monitor circuit is periodically activated and its results are used to trigger the recovery mechanism if necessary. The recovery mechanism is designed to offset the degradation in the reliability hotspots to enhance the lifetime of the circuit. Lifetime is defined as the point where at least one specification of the circuit fails due to aging degradation. A Low noise amplifier (LNA) is fabricated as a case study to demonstrate that the lifetime can be enhanced by the proposed monitoring and recovery techniques.

The problem of neural network synthesis on the precedents is addressed. The aim of the study is to create methods for radial-basis neural network model constructing having high levels of generalization and accuracy, which do not require user participation in the process of model building. The method of decision tree transforming into a neural network model is proposed. For a given sample, a decision tree is built, on the basis of which leaf nodes the cluster centers' are allocated, after which the structure of the radial-basis network is synthesized by associating of selected clusters with neurons of the first layer, the cluster centers coordinates are placed into the weights of neurons of the first layer, and then the weights are adjusted. The method for transforming a regression tree into a radial-basis network is proposed. It allocates clusters for solved problem as a regression tree, but to improve accuracy for each cluster, it builds a particular linear regression model of the output feature dependence from the neuron’s output determining belonging to the corresponding cluster. The method of converting a random forest into a neural network model is proposed. Trees of the forest, built on a given sample, are transformed into separate neural network models, which are combined into joint network. The experiments on practical problems solving were carried out. Their results were confirmed the efficiency of the proposed methods.

Negative-capacitance FETs (NCFETs) are a promising candidate for low-power circuits with intrinsic features, e.g., the steep switching slope. Prior works have shown potential for enabling low-power digital logic and memory design with NCFETs. Yet, it is still not quite clear how to harness these new features of NCFETs for analog functionalities. This article provides more insights into the circuit design space with new device characteristics and investigates its deployment in analog circuits, specifically, time-domain analog-to-digital converters (ADCs) and phase-locked loops (PLLs). We propose and optimize a novel digital-based clocked comparator and a capacitor-based voltage-to-time converter (VTC), which are essential building blocks in ADCs and PLLs. Evaluation results show beyond-FinFET comparison speed and enhanced linearity for the proposed NCFET-based clocked comparator and VTC, respectively. Such improvement is achieved by exploiting the steeper slope and increased output impedance of NCFETs. More details on design details and a discussion are provided in this article.

Analog computing is a promising approach to improve the silicon efficiency for inference accelerators in extremely resource-constrained environments. Existing analog circuit proposals for neural networks, however, fall short of realizing the full potential of analog computing because they implement linear synapses, leading to circuits that are either area inefficient or vulnerable to process variation. In this paper, we first present a novel nonlinear analog synapse circuit design that is dense and inherently less sensitive to process variation. We then propose an interpolation-based methodology to train nonlinear synapses built with deep-submicrometer transistors. Our analog neural network achieves a 29× and 582× improvement in computational density relative to state-of-the-art digital and analog inference accelerators, respectively.

An antenna library is proposed in order to design an antenna system for a wireless device using a circuit-based simulator. The library comprises a set of S-parameters corresponding to a small antenna element (antenna booster) on different wireless platform representative of devices such as smart-meter or smart-watches. The library is useful to wireless engineers to analyse at the very beginning of a design project if bandwidth specifications can be achieved for a given PCB using only a circuit simulator.

In this paper, we propose using the power criterion, known in the control theory as the sensitivity of the system, to evaluate the efficiency of the functioning of various traffic management methods in networks and the influence of the main system parameters on the characteristics. Numerical calculations of link models and network packet transport network according to the sensitivity criterion were conducted. The proposed sensitivity analysis method can be used in network synthesis problems to select the best option, when the design results in several network options that are quite close in their characteristics.

Physically Unclonable Functions (PUFs) are widely adopted in various lightweight authenticating devices due to their unique fingerprints - providing uniform, unpredictable and reliable nature of responses. However, with the growth of machine learning (ML) attacks in recent times, it is imperative that the PUFs need to be resilient to such modeling attacks as well. Consequently, analyzing the learnability of PUFs has initiated a new branch of study leading to establishing provable guarantees (and PAC-learnability) of various PUF designs. However, these derivations are often carried out manually while implementing the design and thereby cannot automatically adjust the changes in PUF designs or its various compositions. In this paper, for the first time, we present an automated framework, called PUF-G, to reason about the PAC-learnability of PUF designs from an architectural level. To enable this, we propose a formal PUF representation language by which any architectural PUF design and its compositions can be specified upfront. This PUF specification can be automatically analyzed through a CAD framework by translating the same to an interim model and then deriving the PAC-learnability bounds from the model. Such a tool will help the designer to explore various compositional architectures of PUFs and its resilience to ML attacks automatically before converging on a strong PUF design for implementation. We also show the efficacy of our proposed framework over a wide range of PUF architectures while automatically deriving their learnability guarantees. As a matter of independent interest, the framework presents the first reported proofs to show that Interpose-PUF (newly proposed), MUX-PUF, FF-APUF, FF-XOR APUF and DA-PUF, are all PAC-learnable.

This paper present a new method to automatically synthesize operational amplifiers. The topology synthesis is based on a functional block modeling. Every op-amp consists of hierarchical functional blocks whose behaviors are describable with analytical equations. Synthesizing the topologies based on functional blocks allows to use the sizing of the topologies during the synthesis process to lessen the number of topologies created not fulfilling the specifications. This makes this method different to previous methods and reduces the time needed to find a large variety of topologies fulfilling a given set of specifications. The paper presents the first prototype of the method.

Stochastic computing (SC) is an emerging paradigm for designing circuits to perform complicated computation with simple circuitry. Although SC circuits have small area and critical-path delay, due to the need of many clock cycles to perform computation, they have a large overall latency and energy consumption. One solution to this problem is to further minimize the circuits. In this work, we explore target function approximation to derive an SC circuit with significantly reduced area and delay. We propose two static methods that first construct a set of functions close to the given target function and then select the best synthesized SC circuit realizing one of these functions. We also propose an efficient dynamic method that simultaneously searches for the best approximated target function and the corresponding minimized SC circuit. The experimental results show that on average, our dynamic method dramatically reduces the area, critical-path delay, and area-delay product of the SC circuits by 80%, 59%, and 91 %, respectively, over the state-of-the-art Maclaurin polynomial-based method for a given error bound of 2%. The code of our methods is made open-source.

This paper presents single-and dual-band filtering power amplifiers (FPA). In single-band FPA, a bandpass filter (BPF) using discriminating coupling is proposed to be utilized as the output matching network (OMN). By analyzing coupling matrix of BPF, impedances of the OMN at fundamental mode and harmonic are controlled independently. In dual-band FPA, a dual-band filtering network synthesis technique is proposed. It includes two steps: building impedance transformation network (ITN) with transmission zeros pair (TZP) to generate dual-band filtering performance and utilizing synthesis technique to obtain the structure parameters by making the fundamental and the second harmonics matched at the two passbands. For demonstration, a single-band FPA with wide bandwidth of 31.1% is implemented and measured. Also, the dual-band FPA exhibits both high bandpass selectivity and good PA performance with maximum power added efficiencies (PAEs) of 70.2% and 69.2% at 1.78 and 2.45 GHz, respectively.

Part 2 of the paper applies interplant water network synthesis using the novel principal pipe representation introduced in part 1 of this paper Alnouri et al. (PIOS 2(4):413–434, 2018). The concept of a principal pipe is presented as a shared pipeline structure that can be assigned several different functions, such as water collection, distribution, or both. A number of principal pipe categories and design aspects have been explored in this study, including pipe routing options, pipe flow directions, pipe sharing scenarios, and pipe water quality. To demonstrate the design of interplant water networks via principal pipes, a non-linear problem (NLP) has been implemented using an economic objective function, so as to allow a cost-optimal selection process for different types of principal pipes within industrial clusters. The proposed approach is illustrated using several examples that involve water regeneration and reuse. The benefits of the proposed methodology are quantified and discussed.

Actual circuits have fractional order characteristics essentially. With the widespread application of fractional order circuits and the great strides in the manufacturing of fractional order elements in recent years, passive synthesis of fractional order circuit becomes an important research content. In this paper, classical Darlington’s synthesis is extended to the two-variable case. Based on two-variable Darlington’s synthesis and variable substitution, synthesis of fractional order immittance function with two element orders is proposed. Finally, an example is given to illustrate the calculation process.

Capacitive power transfer (CPT) technology is a newly emerging research focus for EV charging applications. Due to the absence of eddy current loss and light weight of the capacitive coupling metal plates, CPT technology is considered to be a promising alternative to the inductive power transfer (IPT) technology. However, the parameter identification of the CPT system has not been well studied. In this paper, a multi-parameter identification method based on spectral information is proposed, which based on rational fractional fitting algorithm and network synthesis theory. By adding some known parameters to this method, the parameter identification algorithm under constraint is proposed to improve the noise tolerance of the identification results, and at the same time, it can also have better identification accuracy. The experimental results show that the parameter identification algorithm based on spectrum information can effectively identify the parameters of the circuit model of the CPT system, and the identification accuracy is less than 10%.

Here, a new analytical method, state matrix transform method, is proposed for calculating the descriptions of current waveforms generated by commercial electrostatic discharge (ESD) generators. This method can be used to analyse and design lumped parameter ESD circuits. A relatively simple eight elements ESD circuit model is established and used to predict the current waveform of human-metal ESD events. To calibrate the ESD simulator, a mathematical expression of four exponentials curve for ESD current waveform is given. This careful theoretical study of ESD current waveform calculation makes an innovative contribution to ESD generator circuit simulation and design, and it provides a new mathematical description for ESD sensitivity test.

Spectrally efficient operation with high power and high efficiency at deep backoff will be critical for the next generation of millimeter-wave (mm-wave) transmitters for 5G and beyond. In addition, as larger non-contiguous chunks of the mm-wave spectrum open up, dynamic frequency reconfiguration while ensuring high spectral and energy efficiency can become a key toward optimal utilization of spectral resources. In this paper, we present a generalized network synthesis approach that enables simultaneous frequency and back-off reconfigurability in an mm-wave power amplifier (PA) architecture to maintain high-efficiency operation with spectrally efficient codes across a wide frequency range. We show that frequency reconfigurability and back-off enhancement can be treated in a similar fashion with dynamic impedance synthesis. The method is based on the synthesis of a multi-port combiner network that exploits the interaction of mm-wave DAC cells switched asymmetrically to synthesize the optimal impedances across the 2-D space of reconfiguration: frequency and backoff. As a proof of concept, a PA is presented in $0.13-\mu \text{m}$ SiGe BiCMOS process, which operates across 30–55 GHz with peak $P_{\mathrm{ sat}}$ of 23.7 dBm at 40 GHz, output collector efficiency $\eta _{\text {out}}$ of 34.5% and 22% at the 0- and −6-dB backoff, respectively. The PA maintains $\eta _{\text {out}} > 16\%$ at −6-dB backoff across the range. Non-constant modulation is demonstrated with data rates up to 4 Gb/s across the frequencies from 30 to 50 GHz.

Process-network synthesis is the determination of the optimal network structure of a process system together with optimal configurations and capacities of the operating units incorporated into the system. The aim of developing more and more sophisticated solver algorithms is to find the optimum as fast as possible and increase the circle of practically solvable process synthesis problems. The P-graph framework can effectively reduce the number of structures to be examined and accelerate the computation searching for the optimum due to the exploitation of combinatorial characteristics of candidate solution structures. A cooperative parallel implementation of P-graph algorithms have been published recently to exploit the capabilities of multi-core and multiprocessor systems (Bartos and Bertok in De Gruyter Ser Logic Appl 1:303–313, 2015). The parallel implementation has increased performance significantly but this can be further improved by fine tuning the parameters of the parallel algorithm. Outcomes of experiments on parameter optimization are to be presented herein.

Reliability is naturally one of the most important properties of processing systems, still there is no general method that is capable of simultaneously considering the reliability during the design procedure. Consequently, the optimality of the decisions in process design cannot be guaranteed. The main reason of the lack of general method is that the process design and the reliability engineering are based on different types of mathematical modelling tools. While process design traditionally considered as mixed-integer optimization, reliability engineering is based on probability theory, therefore, a general modelling tool is required that can conveniently cover these two areas. In the present work, it has been shown that the formerly developed combinatorial approach to process network synthesis, the so-called P-graph framework, can conveniently cover and integrate these two areas. The method for reliability analysis of processing systems is general and can effectively analyze complex, highly interconnected networks. Furthermore, the reliability analysis method given here can be embedded to process design tools. A formerly unavailable formula, the system reliability formula has also been defined for processing networks. The focus of the present work is on structures of processing systems, all statements and algorithms are general and proved. The solutions of challenging real problems are also given.

This study addresses the problem of developing a synthesis algorithm for clock spine networks, which is able to systematically explore the clock resources and clock variation tolerance. The idea is to transform the problem of allocating and placing clock spines on a plane into a slicing floorplan optimisation (SFO) problem, in which every candidate of clock spine network structures is uniquely expressed into a postfix notation to enable a fast cost computation in the SFO. As a result, the authors proposed synthesis algorithm can explore the diverse structures of the clock spine network to find globally optimal ones within acceptable run time. Through experiments with benchmark circuits, it is shown that the proposed algorithm is able to synthesise the clock spine networks with 38% reduced clock skew over the clock tree structures, even 11% reduced clock power. In addition, in comparison with the clock mesh structures, the proposed clock spine networks have comparable tolerance to clock skew variation while using considerably less clock resources, reducing clock power by 36%.

Total Site Heat Integration (TSHI) targeting and optimisation methods have been well developed while few studies deal with detailed Utility Exchanger Network (UEN) design. The UEN is the network of heat exchangers that connect a site’s centralised utility system to provide the required process heating and cooling while also facilitating inter-process heat recovery, i.e. TSHI. This paper presents a new UEN design procedure based on the recently developed Unified TSHI targeting method. The Unified method applies more strict constraints on the UEN network, compared to Conventional methods, allowing series utility exchanger matches for a non-isothermal utility if the exchangers in series are from the same process. This constraint reduces the dependency of the individual processes that constitute the Total Site. In UEN design procedure based on the Unified method, calculated utility targets can be archived after UEN design and the number of exchangers reduces compared to the Conventional methods’ design procedure. Also, different Exchanger Minimum Approach Temperature in the UEN synthesis may have an influence on network design and the exchanger configuration but the identical heat recovery and utility targets are achieved after UEN design based on both design procedures.

Emerging nanoscale computing structure quantum-dot cellular automata (QCA) is evolving as a possible replacement for complementary metal–oxide–semiconductor technology in near future. Being a new technology, it is prone to various types of fabrication-related faults and process variations. So, QCA-based circuits are prone to errors, and therefore pose significant reliability-related issues. Hence, there is an emerging need to design fault-tolerant QCA-based circuits to mitigate the reliability issues. This study first presents QCA-based new designs of 2-input Exclusive-OR gate and 1 bit full adder using conventional design approach without redundant QCA cells. Then, the fault tolerance has been implemented in these designs by introducing redundant QCA cells. The proposed circuits exhibit significant improvements in fault-tolerant capability against cell omission, misalignment, displacement, and extra cell deposition defects. The proposed fault-tolerant designs have been compared with existing designs in terms of generalised design metrics of QCA circuits. Energy dissipation results have been computed for the proposed fault-tolerant circuits using accurate QCAPro power estimator tool. Influence of temperature variations on the polarisation of the proposed fault-tolerant circuits has also been investigated. The functionality of the proposed circuits has been verified with QCADesigner version 2.0.3 tool.

We present a new method for the synthesis of mass exchanger networks (MENs) involving packed columns. Simultaneous synthesis of MENs is typically done through the use of mixed-integer nonlinear program (MINLP) optimization, with simplifications made in the mathematical representations of the exchangers due to computational difficulty in solving large non-convex mixed-integer problems. The methodology proposed in this study makes use of the stage-wise based superstructure MINLP formulation for the network synthesis. This stage-wise superstructure model incorporates fixed mass transfer coefficients, fixed column diameters, no pressure drops, and unequal compositional mixing for models. In this paper, the simplified MINLP model is further improved by including a detailed individual packed column design in a non-linear programming (NLP) sub-optimization step, where orthogonal collocation is utilized for the partial differential equations, and optimal packing size, column diameter, column height, pressure drops, and fluid velocities. Detailed designs are then used to determine correction factors that update the simplified stage-wise superstructure models to more accurately portray the chosen design. Once the MINLP is updated with these correction factors, the model is re-run, with new correction factors obtained. This iterative procedure is repeated until convergence between the objective function of the MINLP and that of the NLP sub-optimization is achieved, or until a maximum number of iterations is reached. The methodology is applied to two examples and is shown to be robust and effective in generating new topologies, and in finding superior networks that are physically realizable.

In this paper, the semi-active suspension design problem is concerned by proposing a novel design method incorporating inerters, where the overall semi-active suspension is divided into a passive part and a semi-active part. A mechanical network composed of springs, dampers and inerters is employed as the passive part, and a semi-active damper constitutes the semi-active part. For the conventional semi-active suspensions, the passive part is merely a parallel connection of a spring and a damper, and the main focus is on improving the semi-active part by proposing more effective control algorithms. In contrast, in this paper, the main idea is to improve the overall vehicle performance by improving the passive part instead of the semi-active part. Low-order admittance networks are employed in the passive parts, where some low-order positive real admittance functions are optimized, and then realized as specific mechanical networks by using network synthesis. A suboptimal control law, called steepest gradient control, is utilized in the semi-active part for the control of the semi-active damper. The proposed method is illustrated based on a quarter-car model, and numerical simulations based on a quarter-car and full-car model are performed to show the effectiveness of the proposed method. In contrast to the conventional semi-active suspensions without inerters, the proposed method can provide significant improvements (over 10% and 8% improvements for the quarter-car and full-car model cases, respectively) for the overall suspension performance involving ride comfort, suspension deflection, and road holding.

This work proposes to improve the numerical performance in the rational modeling of full frequency dependent transmission lines. In this paper, latency is used to improve the numerical efficiency of time-domain implementation of the pole-residue representation of the nodal admittance matrix in the case of frequency dependent network equivalents. The idea of latency is to use different time-steps for distinct poles, i.e., fast poles are solved using a small time-step while slower poles may be solved using larger time-steps. For the separation of the slow and fast dynamics, a technique named Multiple Companion Networks (MCN) has been developed. The technique has been applied to transient tests of a transmission line modeled with a rational model. The results obtained indicated that a gain in numerical efficiency is possible without compromising accuracy.

This paper presents a methodology for the synthesis of inter-plant heat-integrated water allocation network (IHIWAN) in industrial parks, to promote the overall level of resource conservation by exploiting the cooperative utilization among multiple plants. Based on superstructure, the proposed method introduces inter-plant integration strategies specific to industrial parks, involving the coupling scheme of water allocation and heat exchange. And a non-linear programming model (NLP) is formulated containing water allocation subsystem and heat integration subsystem. Accordingly, economically optimal IHIWAN is synthesized via two optimization routes respectively: sequential design and simultaneous design. Results of application examples indicate that inter-plant integration of the overall water-heat system in the scale of the park can bring about significant savings compared to the summation of integration within each stand-alone plant. In addition, simultaneous design presents preferable result with regard to overall economic performance, yet sequential design features more targeting flexibility and lower requirement on solution process.

We propose a generalized superstructure-based distillation network synthesis model with improved modeling capabilities resulting in an extended solution space. The model can assign multiple mixtures to be separated (e.g., reactor network effluents) to different columns of the network while considering the interactions among different separation steps. In terms of outlets, products with general specifications, including pure components and multi-component mixtures, as well as streams without strict specifications (e.g., reactor recycle streams) can be readily handled. Furthermore, stream bypass is considered to avoid unnecessary separations, and thermal coupling is considered to yield novel solutions. The proposed model enables seamless integration with reactor network synthesis models thereby leading to solutions that are superior to the ones obtained by conventional sequential approaches.

Research on work exchange between high and low-pressure streams to reduce consumption of relatively expensive mechanical energy has great significance for improving energy efficiency in chemical plants. A novel methodology for the synthesis of direct work exchanger network of isothermal process is first proposed in this article. It is developed based on an improved transshipment model in a linear programming formulation. Two heuristic strategies and six matching rules that explicitly assist identifying feasible match between high and low-pressure streams are proposed. The former strategy is to construct intermediate pressures of low-pressure streams for solving pressure constraints of stream matches. The latter one is applied to find more feasible matches for further reducing both utility consumption and the number of work exchangers. Compared with solutions gained by graphical integration method, the presented method is proved to be more efficient by two examples where specific utility consumption is reduced by 23.4% and 17.6%, respectively.

This work aims to investigate the design and implementation of digital filters for separating clusters in a clustered-orthogonal frequency-division multiplexing scheme for power line communication systems. In this regard, we formulate the mathematical problem and present a criterion which is capable of searching for digital filters that maximizes data rate. In the following, several finite impulse response and infinite impulse response digital filters are analyzed in order to validate the proposed criterion and to verify the best one which fulfills the given constraints. Furthermore, regarding only the best digital filters obtained, a finite precision and complexity analyses are carried out by using a field-programmable gate array device. Based on numerical results, we show that finite impulse response equiripple minimum phase and infinite impulse response Chebyshev type II digital filters yield the best data rates among the chosen digital filters. Moreover, we point out that equiripple minimum phase digital filters consume more hardware resources than Chebyshev type II digital filters, although the first one deal better with the field-programmable gate array constraints when more bits are used to implement the digital filter. Due to that, finite impulse response digital filters are more indicated to be implemented in a field-programmable gate array device.

We present a new optimization-based approach for synthesizing photonic infinite impulse response filters formed using microresonators. Taking into account the finite internal losses in these resonators, we cast the synthesis of filter coefficients as a semidefinite programming problem designed to restrict root-magnitudes set by the internal loss, while meeting filter-mask specifications. We provide a discussion on the formulation of the algorithm, and show how it can be used to design the optical components in a second-order unit cell. In addition, we provide an example of forming a fourth-order low-pass filters by cascading two unit cells. Our simulations show that fourth-order low-pass filters can achieve band-rejection ratios of 60 dB with integrated microresonators that possess an intrinsic quality-factor Q0 of ${\text{1.1}}\times{\text{10}}^5$ .

This paper outlines the development of an optimization-based method for synthesizing a water network, which incorporates various treatment technologies to address the high-concentration wastewater in coal-based chemical plants. One important feature of the proposed approach is that it associates a multistep wastewater treatment design within a source–regeneration–sink superstructure. This design can enforce certain design and structural specifications to tighten the model formulation and enhance solution convergence. A mixed integer nonlinear programming problem is formulated based on the proposed superstructure, which involves unit-specific shortcut models instead of the fixed impurities removal model to describe it accurately. The proposed method for water network synthesis is demonstrated using two case studies, which determine the effect of streams composition and wastewater treatment technologies on the total network cost, freshwater consumption, and water network design. The results highlight the ab...

A new kind of filter called Legendre chained-function (LCF) filter with characteristic function given by the product of low-degree Legendre orthogonal polynomials (seed functions) is studied in this paper. LCF filter magnitude response exhibits unequal ripple level in the passband compared to Chebyshev chained-function filter with identical edge ripple factor at the passband edge. A proper combination of seed functions, i.e., a product of them, is used to control the maximum ripple in the passband, which affects the return loss, selectivity and a group delay characteristics of a filter. By selecting one of the possible combinations of seed functions (thus obtaining various degrees of freedom in filter design), filters with improved performances compared to traditional approximation techniques can be obtained. The degrees of freedom increase if the degree of filter increases. Compared to existing Chebyshev chained-function (CCF) filters, whose performances are also presented, and Butterworth function filters as a special case of both LCF and CCF filters, the new family of LCF filters has many advantages. A table summarizing properties of CCF and LCF filters is given for design purpose.

Continuous time current-mode high-order low-pass and band-pass filters based on the log-domain concept are presented in this paper. The passive RLC ladder networks are used as the prototype to achieve the proposed filter by simulating the RLC network synthesis method. The achieved filters have inherited the good sensitivity performance from the RLC passive prototype. Fifth-order RLC ladder low-pass filter and sixth-order RLC ladder band-pass filter are used as prototypes and the signal flow graph (SFG) technique is used for the synthesis. The SFG can identify group of integrators and several signal paths. Log-domain lossy and lossless integrators based on BJT technology are deployed to achieve the integrators for realization of proposed filters. The simulations were carried out and the results exhibited several features which are in agreement with the RLC prototype. The frequency response of filters along 100 kHz to 10 MHz can be electronically tuned through 5–500 µA of bias currents. The THD lower than 1% of LP and BP filters were measured at 10 MHz input. The multi-tone tested was included in the paper for verifying the performance of proposed LP and BP filters. The intermodulation distortions around −50 dB and −60 dB were also investigated for the proposed LP and BP filters.

In this paper, conventional digital integer order Butterworth (IOB) filter is generalized to digital fractional order Butterworth (FOB) filter.Closed-form designs of digital FOB filters are presented.The discrete sine, cosine and Fourier transforms are used to obtain the coefficients of digital FOB filters.Variable digital FOB filter is designed using the Farrow structure.Digital image sharpening examples are used to show the effectiveness of the proposed digital FOB filters. In this paper, closed-form designs of digital fractional order Butterworth (FOB) filters using discrete transform methods are presented. First, the integer-order Butterworth (IOB) filter is reviewed and the design problem of digital FOB filter is described. Then, the discrete cosine transform (DCT), discrete sine transform (DST) and discrete Fourier transform (DFT) are applied to obtain the transfer functions of FIR fractional order Butterworth filters. Because the closed-form designs are obtained, the filter coefficients are easily computed. Next, the variable FOB filter is designed using the Farrow structure and IIR FOB filter is designed by the Prony method. Finally, application examples in the digital image sharpening are studied to demonstrate the effectiveness of proposed FOB filter design approaches.

This paper presents a new class of filter responses called pseudo-Butterworth filter response. A detailed mathematical analysis on the pseudo-Butterworth response has been carried out. In addition, the comparison between the typical complete Butterworth response and the new pseudo-Butterworth response is provided. The theory for the pseudo-Butterworth filter response indicates that bandwidth tuning maintaining excellent return loss performance can be executed adjusting not all coupling structures of a filter. As an example, a bandwidth tuning method for a second-order filter is presented. For verifying the presented bandwidth tuning theory, a second-order substrate-integrated waveguide (SIW) resonator filter has been designed, fabricated, and measured. As an example of applications to higher order filters, a theory for the fourth-order pseudo-Butterworth responses and a bandwidth tuning method for the fourth-order filters have been developed. A fourth-order filter has also been fabricated and measured for verifying the presented bandwidth tuning technique.

Summary A new class of continuous-time low-pass filter using a set of Jacobi polynomials, with all transmission zeros at infinity, is described. The Jacobi polynomial has been adapted by using the parity relation for Jacobi polynomials in order to be used as a filter approximating function. The resulting class of polynomials is referred to as a pseudo Jacobi polynomials, because they are not orthogonal. The obtained magnitude response of these filters is more general than the magnitude response of the classical ultraspherical filter, because of one additional degree of freedom available in pseudo Jacobi polynomials. This additional parameter may be used to obtain a magnitude response having either smaller passband ripples or sharper cutoff slope. Monotonic, critical monotonic, or nearly monotonic passband filter approximating functions can be also generated. It is shown that proposed pseudo Jacobi polynomial filter approximation also includes the Chebyshev filter of the first kind, the Chebyshev filter of the second kind, the Legendre filter, and many transitional filter approximations, as its special cases. Several examples are presented, and detailed formulas including the practical suggestions for their efficient implementation are also provided. The proposed nearly monotonic filter is compared with the least-square-monotonic filters, designed as critical monotonic, in details. The advantages of the new filters are discussed. Copyright © 2017 John Wiley & Sons, Ltd.