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As air traffic has been increasing in recent years, the environmental impact of aviation is more obvious, forcing governments to impose stringent regulations on emissions. In order to meet these regulations, and reduce the carbon footprint, research has been directed towards the all-electric and hybrid aircraft, where the use of cryogenic HTS machines and cables has been proposed to reduce the overall size of the aircraft. With the cryogenic system already in place, research has been exploring the use of power electronics at lower temperatures in order to obtain systems with higher power densities and lower losses. In this paper several power semiconductor devices are tested at room and cryogenic temperature in order to evaluate their performance at lower temperature. One of the tested devices, a 'CoolMOS' superjunction MOSFET, is used in a single voltage source phase-leg which is experimented with at room and cryogenic temperature to evaluate its efficiency as a primary indication of its usefulness in the All-Electric Aircraft.

This paper reports a pioneering demonstration platform of a cryogenic propulsion unit at liquid nitrogen temperature. A high temperature superconducting (HTS) machine is connected with a cryogenic power rectifier in a generator mode to prove the feasibility of a cryogenic propulsion unit for electric aircraft propulsion applications. Machine operation was carried out with a special focus on the total heat dissipation inside the HTS AC windings. Different types of 2G HTS tapes were tested to provided data for stator coils’ design. The transient operation was carried out to represent a short-circuit failure in one of the power electronic devices. The test shows AC loss performance of the HTS windings using calorimetric method during the short circuit event, indicating the importance of developing protection schemes for the cryogenic propulsion units to prevent damage to the HTS components. The paper provides initial insights into the interaction between superconducting machines and cryogenic power electronics within a cryogenic propulsion unit. It is an important first step to understand and further develop cryogenic propulsion technology for future electric aircraft.

Active gate driving of power devices seeks to shape switching trajectories via the gate, for example, to reduce EMI without degrading efficiency. To this end, driver ICs with integrated arbitrary waveform generators have been used to achieve complex gate signals. This article describes, for the first time, the implementation details of a digitally programmable arbitrary waveform gate driver capable of a 10-GHz waypoint rate, including comprehensive design considerations for critical high-speed subsystems that codify the tradeoff in flexibility, speed, and area. The design, which is taped out in a 180-nm high-voltage CMOS process, utilizes buffers that switch up to ten times in a single clock cycle to overcome the limited achievable clock speed of high-voltage silicon integrated circuits and a fully digital architecture to provide robustness under high slew rates of the ground rail. The driver IC has networks of 100-ps delay elements that are configured prior to a switching transient, to selectively control an array of fast, parallel-connected drivers with different output impedances. Key to the high timing resolution are high-speed asynchronous circuits for memory readout, output buffering, and pulse generation. The driver IC is experimentally evaluated to have a 100-ps resolution and to operate reliably in a 400-V gallium nitride (GaN) bridge leg, under ground-rail voltage slew rates peaking at over 100 V/ns. Design rules are provided to obtain an architecture with the least area for a given set of timing and impedance resolution requirements. The reported design methods enable complex driving waveforms to be applied during nanosecond-scale transients of GaN power devices and demonstrate how digitally programmable active gate drivers for GaN power FETs can be designed to meet a given set of application requirements.

A strong candidate device for use in high-efficiency and high-density power converters is the SiC bipolar junction transistor, which requires a continuous gate (base) current to maintain its on -state. A base driver circuit with regenerative collector current feedback using a current transformer, and a negative off -state base-emitter voltage is presented in this article. The off -state base-emitter voltage required to prevent simultaneous conduction of a commercially available device when subjected to d v /d t’ s is assessed. The device is then utilized in a three-phase dc-to-ac power converter where the efficacy of using the proposed base driver is evaluated. The off -state base-emitter voltage used is informed by the d v /d t tests. The converter is supplied from a 600-V dc rail, switches at 50 kHz and supplies a 4.1-kW load at a modulation index of 0.9. An efficiency of 97.4% was measured.

Fast-switching power converters are a key enabling technology for the more electric aircraft (MEA), but the generated electromagnetic interference (EMI) poses significant challenges to the electrification effort. To meet the stringent aerospace EMI standards, passive filters are commonly employed, despite the weight and size constraints imposed by the MEA. Alternatively, the EMI source, i.e., the high $dv\text{/} dt$ and $di\text{/} dt$ slew rates, can be addressed through waveform-shaping techniques. For example, while most soft-switching converters can reduce switching loss, they do so by switching the semiconductor devices in a slower and smoother manner, resulting in the attenuation of high-frequency harmonics. This paper examines the auxiliary commutated pole inverter (ACPI) topology, and its first contribution is the attenuation of the high-frequency content of its EMI source, that is, the output voltage, in a predictable manner, through the active control of the resonant circuit. This is achieved by first, discussing the time-domain characteristics of trapezoidal and S-shaped pulse-trains that lead to attenuated high-frequency harmonic content, and second, by analyzing the equivalent LC circuit of the ACPI. The design of the inverter is then focused on the active control of the resonant parameters, for a predetermined and enhanced output voltage high-frequency response. The second contribution of this paper is the comparison of the EMI performance of hard switching and of three soft-switching modes, fixed-timing control, variable-timing control, and capacitive turn- off s, and how this informs important metrics such as power efficiency, current stress, and implementation complexity. Finally, the third contribution is on the trade-offs that arise when the primary design goal is enhanced EMI performance as opposed to switching loss reduction. A 5-kW, 3-phase ACPI prototype is used for validating the high-frequency content attenuation at source. It is shown that the ACPI can achieve a 37 dB harmonic attenuation of its output voltage at 4 MHz, compared to a hard-switched inverter.

Active gate driving has been demonstrated to beneficially shape switching waveforms in Si- and SiC-based power converters. For faster GaN power devices with sub-10-ns switching transients, however, reported variable gate driving has so far been limited to altering a single drive parameter once per switching event, either during or outside of the transient. This paper demonstrates a gate driver with a timing resolution and range of output resistance levels that surpass those of existing gate drivers or arbitrary waveform generators. It is shown to permit active gate driving with a bandwidth that is high enough to shape a GaN switching during the transient. The programmable gate driver has integrated high-speed memory, control logic, and multiple parallel output stages. During switching transients, the gate driver can activate a near-arbitrary sequence of pull-up or pull-down output resistances between 0.12 and 64 Ω. A hybrid of clocked and asynchronous control logic with 150-ps delay elements achieves an effective resistance update rate of 6.7 GHz during switching events. This active gate driver is evaluated in a 1-MHz bridge-leg converter using EPC2015 GaN FETs. The results show that aggressive manipulation of the gate-drive resistance at sub-nanosecond resolutions can profile gate waveforms of the GaN FET, thereby beneficially shaping the switch-node voltage waveform in the power circuit. Examples of open-loop active gate driving are demonstrated that maintain the low switching loss of constant-strength gate driving, while reducing overshoot, oscillation, and EMI-generating high-frequency spectral content.

High-efficiency power converters have benefits of minimizing energy consumption, reducing costs, and realizing high power densities. The silicon super-junction MOSFET is an attractive device for high-efficiency applications. However, its highly non-linear output capacitance and the reverse recovery properties of its intrinsic diode must be addressed when used in voltage source converters. A dual-mode switching technique operating in conjunction with intrinsic diode deactivation circuitry is proposed in this paper. The technique is demonstrated in an 800-W inverter-leg configuration operating from a 400-V DC voltage rail and switching at 20 kHz. Intended applications include machine drives. The full-load efficiency reaches approximately 98.7% and no forced cooling is needed.

In this paper a high efficiency DC-DC converter power stage employing silicon Super-Junction (SJ) MOSFETs is presented. These devices have low on-state resistances and fast switching capabilities. However, their intrinsic body diode has a very poor reverse recovery behavior and they have an output capacitance that has a highly non-linear inverse relationship with voltage. These characteristics lead to problematic charging currents when they are used in bidirectional voltage source converters. These problems are addressed through implementation of an auxiliary resonant source charge extraction circuit in conjunction with anti-series MOSFETs. The result is a 5-kW power converter with a power semiconductor stage full-load efficiency exceeding 99% and requiring no forced cooling.

Widespread adoption of electric vehicles will require ac power distribution systems to accommodate high penetrations of power electronic loads, placing increasing demands on the power quality of grid-connected converters. Recent developments in devices and circuit topologies have the potential to improve the intrinsic power quality of these grid interface inverters, reducing the need for passive filters and associated reactive power consumption. Wide bandgap devices, such as SiC, have recently gained much attention due to their low switching losses facilitating raised pulsewidth modulation frequencies. However, the high cost of SiC together with electromagnetic interference (EMI) resulting from very rapid switching transitions necessary to realize low switching losses cause concern. Previous research in Si MOSFET modular multilevel converters (MMC) suggests a high-efficiency alternative with potential for lower EMI. Si MOSFET MMC benefits are enhanced with parallel-connected devices and slowed switching, made possible by low effective switching frequency. This paper uses experimental results to explore the impact of parallel connection and slowed switching on Si MOSFET MMC losses, and presents improved Si MOSFET switching loss models to resolve inaccuracies observed with conventional Si MOSFET models. EMI is then compared between SiC and Si MMC using carefully controlled relative measurements of radiated EMI.

A highly efficient 5-kW bidirectional dc–dc converter power stage operating from a 400-V supply implementing super-junction (SJ) metal–oxide–semiconductor field-effect transistor (MOSFETs) is presented. SJ MOSFETs have low on-state resistances and low switching losses. However, their application in voltage-source converters can be compromised by the reverse recovery behavior of their intrinsic diodes and their highly nonlinear output capacitances. A series switching-aid circuit is used to control the output capacitance charging current. The dead times between switching transitions are assessed and optimized in order to deactivate the intrinsic diodes. The combination of these techniques enables very high efficiencies to be attained. Calorimetric measurements indicate a full-load efficiency of 99.1% for the prototype 5-kW dc–dc converter power stage. A loss reduction of approximately 50% is achieved with the prototype converter power stage when compared to an equivalent insulated-gate bipolar transistor (IGBT)-based power stage. Lastly, a loss versus duty cycle function is experimentally determined, which can be used to inform the design of a maximum efficiency point tracking system.

High-efficiency (e.g. 99%+) converters bring benefits in terms of lower energy consumption, reduced cooling requirements (e.g. smaller heatsinks), high power density and potential material cost saving. Super-junction MOSFETs have low on-state resistances and low switching losses, which are essential for high-efficiency operation. However, the reverse recovery behavior of their intrinsic diodes and their output capacitances make their deployment in freewheeling locations challenging. The non-linear output capacitance of SJ MOSFETs may cause significant voltage overshoot, EMI and switching loss. This paper proposes using a novel combination of snubber circuitry and intrinsic diode deactivation circuitry for a three-level T-type converter to address the non-linear capacitance and poor intrinsic diode issues. Benefits of multilevel conversion include reduced harmonic currents for a given switching frequency and filter component size, and a lower switched voltage giving a lower switching loss. Results are given for a 600-V converter supplying a 3-kVA load. Intended applications are in small machine drives and UPS systems. No forced cooling is needed and efficiency is calculated in excess of 99%. A step-by-step approach to locating snubber elements in voltage source converters is elucidated and the power device and ancillary circuit requirements for three-level NPC and T-type circuits are compared.

Silicon Carbide (SiC) devices, with their superior properties, have made it possible to design converters with power densities that were previously unattainable with silicon (Si), Recently there have been several SiC based power converter designs that successfully utilize the device's higher breakdown voltage and faster switching speed. However, few designs have taken advantage of the ability of SiC devices to operate at higher temperatures. This is especially important from a design optimization standpoint since the higher the temperature the switching devices can operate at, the smaller the cooling component of the converter needs to be. To this end a design tool was created that optimizes the volume of a DC to 3-phase AC converter, whilst taking into account the temperature dependency of the switching devices. The tool selects the switching frequency, devices, passive components and heatsink that will minimise the overall volume of the converter. The tool was used to design a 5-kW rated converter that used high temperature SiC bipolar junction transistors (BJTs). Several converter designs were produced for maximum junction temperatures of 125, 150 and 175 degrees Celsius, all of which were prototyped and experimentally verified.

SiC devices are now achieving voltage and current ratings which challenge applications previously dominated by IGBTs. Unlike with IGBTs parallel connection of SiC devices may be used to reduce conduction losses. SiC conduction loss is reduced with low Rds(on), or large die area, while switching loss reduction requires small Coss, and small die area. An improved analytical model is presented to accurately predict SiC switching loss. Extensive experimental data is used to verify the accuracy of the model for two different SiC devices. This paper then presents a simple technique for identifying optimum Rds(on) at a given switching frequency using a Figure of Merit (FOM) for SiC. The FOM is then used in a simple model to approximate SiC losses and is combined with a simple filter model to attempt to identify optimum switching frequency, and this is compared with the full model. It is shown that the FOM model comes close to predicting optimum switching frequency, but the full model must be used to accurately pinpoint optimum switching frequency. The FOM technique therefore has value in identifying optimum die area and device choice so that the full, more complex model need only be implemented once.

An SMPS for hybrid electric vehicle and electric vehicle applications is presented. The use of SiC BJTs in the primary-side switching circuitry is investigated. Practical deployment aspects are addressed. Particular attention is given to the design of the BJT base driver stage and a bespoke turn-on switching-aid circuit. Mathematical design calculations are not presented, but the proposed circuitry is demonstrated in a 1-kW isolated-output DC-DC converter operating from 800 V and supplying 48 V at a switching frequency of 60 kHz. Full-load efficiency was evaluated at 93.3% using a calorimeter.

Active gate driving provides an opportunity to reduce EMI in power electronic circuits. Whilst it has been demonstrated for MOS-gated silicon power semiconductor devices, reported advanced gate driving in wide-bandgap devices has been limited to a single impedance change during the device switching transitions. For the first time, this paper shows multi-point gate signal profiling at the sub-ns resolution required for GaN devices. A high-speed, programmable active gate driver is implemented with an integrated high-speed memory and output stage to realise arbitrary gate pull-up and pulldown resistance profiles. The nominal resistance range is 120 μΩ to 64 Ω, and the timing resolution of impedance changes is 150 ps. This driver is used in a 1 MHz GaN bridge leg that represents a synchronous buck converter. It is demonstrated that the gate voltage profile can be manipulated aggressively in nanosecond scale. It is observed that by profiling the first 5 ns of the control device's gate voltage transient, a reduction in switch-node voltage oscillations is observed, resulting in an 8–16 dB reduction in spectral power between 400 MHz and 1.8 GHz. This occurs without an increase in switching loss. A small increase in spectral power is seen below 320 MHz. As a baseline for comparison, the GaN bridge leg is operated with a fixed gate drive strength. It is concluded that p-type gate GaN HFETs are actively controllable, and that EMI can be reduced without increasing switching loss.

The application of active gate driving to 40 V GaN FETs has previously been shown to reduce ringing and EMI-generating spectral content in the switch-node voltage waveforms. This paper, for the first time, shows active gate driving applied to 650 V GaN FETs, and the shaping of device voltages and currents during switching transients. A custom integrated active gate driver is used, which can dynamically vary its output resistance from 0.12 to 64 Ω, with a 150 ps timing resolution. At 200 V DC link and 10 A load current, a significant degree of control over the active-switch drain current and switch-node voltage is demonstrated, for both buck and boost mode operation. The current overshoot and ringing in the power waveforms due to circuit parasitics are actively reduced and the voltage oscillations in the DC link are damped. The timing of resistance sequences is shown to be critical to the success of active shaping methods, thus justifying the unparalleled 150 ps resolution of the driver. Under continuous operation and at reduced ratings of 100 V and 2 A load current the significant control of the switch node voltage and voltage spectra is also demonstrated. The switching delay is reduced, and parts of the spectrum are reduced by up to 9 dB, equivalent to the effect of tripling the gate resistance but without any reduction in the overall switching speed.

Silicon carbide (SiC) switching power devices (MOSFETs, JFETs) of 1200 V rating are now commercially available, and in conjunction with SiC diodes, they offer substantially reduced switching losses relative to silicon (Si) insulated gate bipolar transistors (IGBTs) paired with fast-recovery diodes. Low-voltage industrial variable-speed drives are a key application for 1200 V devices, and there is great interest in the replacement of the Si IGBTs and diodes that presently dominate in this application with SiC-based devices. However, much of the performance benefit of SiC-based devices is due to their increased switching speeds ( di/dt, dv/ dt), which raises the issues of increased electromagnetic interference (EMI) generation and detrimental effects on the reliability of inverter-fed electrical machines. In this paper, the tradeoff between switching losses and the high-frequency spectral amplitude of the device switching waveforms is quantified experimentally for all-Si, Si-SiC, and all-SiC device combinations. While exploiting the full switching-speed capability of SiC-based devices results in significantly increased EMI generation, the all-SiC combination provides a 70% reduction in switching losses relative to all-Si when operated at comparable dv/dt. It is also shown that the loss-EMI tradeoff obtained with the Si-SiC device combination can be significantly improved by driving the IGBT with a modified gate voltage profile.

Parasitic inductance in the gate path of a silicon carbide MOSFET places an upper limit upon the switching speeds achievable from these devices, resulting in unnecessarily high switching losses due to the introduction of damping resistance into the gate path. A method to reduce switching losses is proposed, using a resonant gate driver to absorb parasitic inductance in the gate path, enabling the gate resistor to be removed. The gate voltage is maintained at the desired level using a feedback loop. Experimental results for a 1200-V silicon carbide MOSFET gate driver are presented, demonstrating the switching loss of 230 μJ at 800 V and 10 A. This represents a 20% reduction in switching losses in comparison to that of conventional gate drive methods.

The paper assesses the potential of employing super-junction MOSFETs in a high efficiency and low cost bidirectional DCDC converter for application in electric vehicle systems. Super-junction MOSFETs have a very low conduction loss, however, their poor intrinsic diode recovery behaviour and high output capacitances means that switching losses can be high in voltage source converters. A drain current injection technique is presented that can be used to mitigate the poor switching characteristics and thus realise excellent power conversion efficiencies. Experimental results are given for a circuit operating at 400V, 5kW and 25kHz and the means of achieving a power conversion efficiency >99% is outlined.

The auxiliary commutated pole inverter (ACPI) is a PWM soft-switching topology usually employed for switching loss reduction. This work however investigates how the two traditional ACPI control schemes, fixed- and variable-timing, can shape the transitioning edges of the inverter's output voltage. Its frequency response can then be predicted and its high-frequency content mitigated, with potential enhancements to the inverter's Common Mode Electromagnetic Interference (CM EMI) performance. By addressing the EMI problem at source, lighter passive filters might be used, beneficial to applications where high power densities are desirable. A 5-kW, 3-phase ACPI prototype is utilized for proof of concept.

A new design method for producing high-performance and power-rail slew-tolerant floating-voltage level shifters is presented, offering increased speed, reduced power consumption, and smaller layout area compared with previous designs. The method uses an energy-saving pulse-triggered input, a high-bandwidth current mirror, and a simple full latch composed of two inverters. A number of optimizations are explored in detail, resulting in a presented design with a dVdd/dt slew immunity of 30 V/ns, and near-zero static power dissipation in a 180-nm technology. Experimental results show a delay of below 370 ps for a level-shift range of 8-20 V. Postlayout simulation puts the energy consumption at 2.6 pJ/bit at 4 V and 7.2 pJ/bit at 20 V, with near symmetric rise and fall delays.

This paper presents a high efficiency 5-kW bidirectional DC-DC converter for use in electric vehicle super-capacitor systems. Super-junction MOSFETs are deployed in the power stage to minimize losses. This is achieved using a snubber inductor and by arranging the gate signal underlap delays in order to control charging current caused by the devices' highly non-linear output capacitance and to deactivate the intrinsic body drain diode respectively. The result is a 5-kW power converter with an estimated efficiency exceeding 99% in the power semiconductor stage and requiring no forced cooling.

This paper presents a high-efficiency quasi Z-source inverter with discontinuous input current deploying super-junction MOSFETs as bridge devices to minimise losses. Z-source inverters and quasi Z-source inverters can accommodate two major challenges exhibited by super-junction MOSFETs which would normally make their use problematic in traditional voltage source converters. Firstly, the intrinsic diodes of super-junction MOSFETs tend to exhibit adverse behaviour and secondly, the output capacitance, Coss, is highly non-linear with applied voltage increasing with reducing drain-source voltage. The losses exhibited by the bridge devices in the demonstrator converter at 1.525kW are 13W, or 0.78% and these devices do not require forced cooling, in contrast to IGBTs and p-n anti-parallel diodes when used as equivalent bridge devices.

A proportional base driver circuit for SiC bipolar junction transistors is presented. A current transformer feeds a proportion of the transistor's collector current into its base. The influence of the current transformer's magnetising current on its output current is addressed, as are minimum reset time restrictions. The circuit applies a negative off-state baseemitter voltage. Combining this and a regenerative proportional base drive current does not incur undue complexity or cost. The circuit is evaluated in a buck converter supplied from a 600V rail, switching at 50kHz and at a duty factor of 85%, and outputting 2.52kW.

Silicon super-junction MOSFETs have very low on-state resistances and fast switching characteristics. However, their use in voltage-source converters is hindered by the poor reverse recovery performance of their body drain diode and an adverse output capacitance characteristic. These both act to increase the overall switching loss. The on-state resistance and output capacitance characteristics of super junction devices are both related to the area of the silicon die. As this increases, the on-state resistance decreases but the output capacitance increases. A figure of merit is evaluated with both predicted and experimental results using a 400-V, DC-DC synchronous buck-converter operating over a range of output currents and switching frequencies.

This paper proposes a general circuit model and design method for resonant gate drivers. Topologies in the literature are analyzed by dividing each switching transient into up to five energy transfer stages, for which general analytical equations are derived. A general resonant gate driver circuit model is presented. Several reviewed topologies are identified as unique combinations of current paths within this circuit model, providing a basis for classification. This establishes a relationship between topology performance and architecture, which is verified experimentally using a reconfigurable test circuit.

The primary aim of the research is to demonstrate the fabrication and operation of a traveling wave actuator made from a silicone dielectric elastomer. Multiple folded stack configurations of a silicone are assembled to create individually controllable regions in a single device, allowing a traveling-wave pattern of electrical stimuli to be applied to each active region. The prototype actuator is sandwiched between two friction surfaces allowing motion in response to the traveling wave. A number of issues related to the research and development of the prototype actuator are considered, including traveling-wave principle, folded stack design, actuator fabrication, and electrical control. A prototype is tested with a bespoke multiple-channel high-voltage converter to assess the performance characteristics of stroke, force, and frequency. Practical velocities and forces are achieved; however, a number of challenges are discussed in order to increase performance to comparable levels exhibited by commercial actuators with high-force long-stroke capabilities.

The design of a high-fidelity electronic current sensor for utility power-metering applications is described. The sensor is based around a current transformer with a low-permeability core material in order to yield a high dc tolerance and improved immunity to extraneous dc magnetic fields. The transformer is configured with a flux-change sense winding and feedforward of the voltage developed across the secondary winding and burden resistances. This minimizes the error due to magnetizing current which would otherwise be high with a low-permeability core material. Experimental results are given for a 60-A sensor designed for single-phase 50- and 60-Hz systems. Measured phase error is less than 0.6° at 50 Hz with 60-A dc current superimposed onto the current under measurement. No Hall-effect sensors or core-gapping operations are required. Combined with simple analog electronic circuitry, this provides a low-cost solution.

PurposeThe main limit of an electromagnetic design lies in its thermal performance. Accurate prediction of the temperature within a new device is therefore very desirable. The purpose of this paper is to present an accurate method of predicting temperature that has been applied for design of a high‐energy density choke.Design/methodology/approachThe thermal analysis has been carried out using initially a two‐dimensional (2D) finite element method (FEM) and then a thermal lumped parameter network. The heat flow within the network was informed from the 2D FEM analysis.FindingsThe presented lumped parameter thermal model of the high‐energy density choke has been experimentally validated and shows good agreement with the test data. The high‐energy density equal to 0.49 J/kg is demonstrated as a result of the improved thermal management and permanent magnet biasing.Practical implicationsThe results show a 1.75 increase of the energy density for the new choke design as compared with more conventional design. The low weight and volume of such components are desirable in many applications including automotive and aerospace.Originality/valueThe presented method allows for fast temperature predictions that can be used in design and optimisation of high‐energy density inductors.

This paper describes the thermal analysis of an external-rotor brushless permanent-magnet motor used in a traction application. The machine has a nonstandard open-slot stator lamination and is wound with a single-layer concentrated ``modular'' winding. This structure potentially has several heat transfer advantages compared to the more traditional double-layer concentrated winding. An analytical lumped-parameter thermal model has been developed for the machine to gain an understanding of the main cooling mechanisms and to investigate the potential heat transfer advantages. The thermal advantage of the modular winding over the more conventional 1.5-slot-per-pole design is presented. Results from the developed thermal model have been validated experimentally on a prototype wheel hub motor.

This paper presents a methodology for analyzing the thermal performance of compact planar wound components. A high-energy-density prebiased choke is used to demonstrate and validate the proposed approach. Loss predictions from electromagnetic finite-element analyses are coupled to an equivalent lumped-circuit thermal model and used to determine the operating thermal envelope for the wound component. Results from the proposed method are directly compared with test measurements taken from the prototype choke and are shown to be in good agreement. A sensitivity analysis indicates that copper loss is the dominant component in such devices and that AC resistance effects are more prominent than core loss.

The combined asymmetric half-bridge power converter topology is often used to drive switched reluctance machines (SRMs). This letter describes a transformer-isolated power semiconductor gate driver circuit that uses only two transformers to supply all three power devices in a combined asymmetric half bridge with local power supplies and drive signals. Therefore, the entire gate driver circuitry for a six-switch converter driving a four-phase SRM requires only four isolation transformers, thereby reducing cost. Operation of a prototype circuit is demonstrated.

This paper investigates the application of reset voltage feedback for reducing errors due to droop in the signal derived from a current transformer sensing unidirectional current pulses in switched-mode power converter applications. Droop is minimised by applying a correcting voltage in series with the transformer's output terminals during the current pulse. The magnitude of the correcting voltage is based on the transformer's reset voltage sensed during the power converter's previous switching cycles. A model of the scheme is presented and a circuit is implemented. Reductions in both peak and average current droop are demonstrated.

PWM-controlled power converters are increasingly used in the More Electric Aircraft (MEA). However, Electromagnetic Interference (EMI) is introduced due to the high dv/dt and di/dt slew rates of their fast-switching power devices. Though EMI is conventionally mitigated by adding filters that can be often heavy and bulky, a better solution would be to address it at source, in order to achieve higher power density systems. This paper investigates how soft-switching topologies can attenuate EMI by addressing it at source. Specifically, the auxiliary commutated pole inverter (ACPI) is employed to actively control the dv/dt of the output voltage. The effect this control has on the output voltage frequency spectrum is examined with analytical models. Subsequently, a control scheme is developed for regulating the output voltage to the desired waveform and simulation results are presented. A 1.4-kW ACPI phase-leg prototype is utilized for proof of concept. Reductions in the harmonic content of the output voltage are observed in the range of 1 to 20 MHz. It is expected that the ACPI can benefit from better EMI performance and can contribute to the overall effort of achieving high power density systems for MEA applications.

Electric actuators in automotive systems may require a current transducer for control purposes. A low-cost non-invasive transducer design based around a current transformer (CT) is described in this letter. The problem of droop in the output signal is addressed by controlling the CT's secondary terminal voltage in response to the core flux change. This is detected using a tertiary flux-change sense winding. The circuit is suited for use in high-temperature automotive environments. The bandwidth of the circuit is high allowing it to be used in peak current mode or hysteresis control schemes. Operation when sensing a 100-A current pulse of 10-ms duration is demonstrated

Power maximisation techniques in wideband vibration energy harvesting typically require the periodic sensing of input power or excitation frequency. This paper presents low- power circuits and sensing methods to obtain this information. First, an excitation frequency measurement circuit is presented that permits a reduced timer run-time compared to reported methods. Second, a power sensing method is presented, which extends the measurement range of reported techniques by adapting to the levels of the available power. Experimental results for the frequency measurement circuit tested in the range 35-51 Hz show a power consumption of 3.7 μW. The power-sensing technique is experimentally validated over a power range of 370690 μW, and its power consumption is 7.5 μW.

Charge-compensated or "Super-junction" MOSFETs exhibit low on-state resistances and low switching losses. However, the reverse recovery behaviour of their intrinsic diodes and their output capacitance characteristics make their deployment as synchronous rectifiers challenging. A simple auxiliary circuit is proposed to address these issues, by reversing the direction of current flow in the MOSFET channel at turn-off, thereby deactivating the intrinsic antiparallel diode and partially charging the MOSFET output capacitance. The proposed technique is verified on a 400 V, 1 kW buck converter.