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This paper describes the modeling of power-factor-correction converters under average-current-mode control, which are widely used in switch-mode power supply applications. The objective is to identify stability boundaries in terms of major circuit parameters for facilitating design of such converters. The approach employs a double averaging procedure, which first applies the usual averaging over the switching period and subsequently applies generalized averaging over the mains period. The resulting model, after two averaging steps and application of a harmonic balance procedure, is nonlinear and capable of describing the low-frequency nonlinear dynamics of the system. The parameter ranges within which stable operation is guaranteed can be accurately and easily found using this model. Experimental measurements are provided for verification of the analytical results. Index Terms--Averaged model, closed-form stability condition, double averaging, power factor correction (PFC), switching converters.

An improved version of an inductor-switching fast-response dc-dc converter is presented that will provide the requirements and features of the new generation of microprocessor and digital systems. Lower output voltage, higher output current, and smaller output voltage ripple requirements have greatly increased the difficulty of the power supply design. To further increase the problem, power-saving 'stop-clock' modes of the microprocessor has demanded faster and more stable transient response from the dc-dc converter. A novel method of inductor switching is applied to a dc-dc converter, and it provides the prominent features of current amplification and absorption during the heavy burden of load transients. The design and simulation of the concept is verified by experiment with a 12-V input and 3.3-V/30-A output converter. Index Terms--Analog circuit, dc-dc power conversion, inductor switching, voltage control.

The boost power-factor-correction (PFC) converter with average-current-mode control is a nonlinear system due to the effects of the multiplier and a large variation of the duty ratio. Although its stability analysis must be studied depending on a nonlinear model, most prior research attempted to make some assumptions to force this nonlinear system to be linear. As a result, the practical dynamics and the nonlinear phenomena were disregarded. In this paper, two kinds of nonlinear phenomena are detected under the conditions that are considered to be stable by the prior criteria: one is period-doubling bifurcation and the other is chaos. Stability maps and phase-plane trajectories are introduced at different loads to clarify the power factor and also the instability regions. It is clear that the output storage capacitor is a main contributing parameter on the system stability, therefore, bifurcation maps are developed to determine the accurate minimum output capacitance value that assures the system stability under all operating conditions. Also, PFC converter stability is explained and judged by comparing the consequence of charging and discharging energy in the output capacitor. Index Terms--Bifurcation, boost converter, chaos, instability phenomena, nonlinear analysis, power-factor correction (PFC), stability.

Because conventional switching converters have usually used unbalanced circuit topologies, parasitic capacitance between the drain/collector of an active switch and the frame ground through its heat sink may generate the common-mode conducted noise. This paper proposes a balanced switching converter circuit, which is an effective way to reduce the common-mode conducted noise. As an example, a boost converter version of the balanced switching converter is presented, and the mechanism of the common-mode noise reduction is explained using an equivalent circuit. This good feature is confirmed by experimental results. The concept of the balanced switching converter is applied to some other types of switching converters. Index Terms--Balanced circuit, common-mode conducted noise, switching converter.

A new control method for an ac/dc converter using a piezoelectric transformer is presented. The combination of pulse width modulation and pulse frequency modulation makes it possible to control the output voltage, and its adaptability to a worldwide range of input voltage variation. The ac/dc converter implemented on a printed circuit board is experimentally evaluated, and as a result, good controllability is successfully achieved. The highest efficiency of 86% was obtained at an input voltage of ac 90-270 V, output voltage of 17 V, load current of 0.57-1.4 A, and operating at frequencies around 107 kHz. Index Terms--Converter, input voltage, output voltage, printed circuit board, PT.

PECS (Power Electronics Circuit Simulator) enables the time-domain simulation of switched networks that may contain nonlinear elements. Focus has been placed not only on obtaining high speed, but also on achieving a very high degree of accuracy. A set of optimized computer algorithms that have been incorporated into PECS to achieve these objectives are explained. Examples run, which include a power-factor correction circuit containing a multiplier/divider element, have shown over an order of magnitude speed advantage over other leading approaches. Index Terms--Simulation, switched networks.

Problems of synchronous rectification in a parallel-module dc-dc converter system are described. These include excessive power dissipation due to the bidirectional current flow capability of MOSFET's and abnormal oscillation due to the cross coupling of the MOSFET's used as synchronous rectifiers. The abnormal oscillation, which causes excessive voltage stress, is analyzed; the results of which are subsequently confirmed by experiment. Methods for solving abnormal oscillation problem are discussed. Index Terms--Paralleled converter system, reverse current, self-oscillation, synchronous rectifier.

An efficient integration routine based on the Chebyshev series expansion is given. Adoption of a Chebyshev expansion minimizes the order of the polynomial approximation which together with a number of basic properties of the expansion results in an efficient integration method. Furthermore, integration error control may conveniently be approached by monitoring the coefficients of the expansion. The proposed error control scheme varies the expansion order while keeping the step size fixed. A software program for the simulation of networks with ideal switches was written which incorporates the above features. Two examples, one of a nonswitched network and the other of a switched network, are given to illustrate the speed and accuracy of the program and effectiveness of the error control scheme. To quantify the advantages of the proposed scheme, a comparison is made with a previously developed simulator (viz., LAPS) and also a commercially available SPICE program. Index Terms--Chebyshev series, numerical integration, simulation, switched networks, transient.

This paper presents circuit design techniques for reducing the effects of magnetic flux, occurred from the planar transformer, on gallium nitride high-electron-mobility transistors (GaN-HEMTs) in 5-MHz 100-W high power-density LLC resonant dc–dc converters. For investigating the effects of magnetic flux on a GaN-HEMT, power device model for finite element method (FEM) simulation is proposed. In order to confirm the validity of the model, the quantitative evaluation is conducted with FEM simulation, and experiment using evaluation boards. Moreover, the optimization of printed circuit board layout is considered using the verified model with FEM simulation, for reducing the effects of magnetic flux on GaN-HEMTs while reducing the area of converter. In the experiments, 5-MHz 48 V/12 V 100 W unregulated LLC resonant dc–dc converter with efficient power conversion GaN-HEMTs is built as the prototype to verify the optimized layout. The maximum power efficiency can be achieved 91.28%, and the power density can be achieved 32 W/cm3. [ABSTRACT FROM AUTHOR]