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In AlGaN/GaN high electron mobility transistors (HEMTs), high temperature processes (such as ohmic annealing with >800°C value) could deform the crystal structure and induce trap states within the bulk and surface. Expanded defect densities cause crucial problems, such as threshold voltage ( Vth ) instability, current collapse, and high leakages. In this work, a low temperature ohmic contact process (630°C, 10 minutes) is adopted with recess etch, and contact resistances

This paper presents a method to reveal the channel temperature profile of high electron mobility transistors (HEMTs) in a multi-stage monolithic microwave integrated circuit (MMIC). The device used for this study is a two-stage X-band low-noise amplifier fabricated using 0.15 m GaN-on-SiC technology with 4x50 m and 4x75 m HEMTs at the first and the second stage, respectively. The surface temperature measured through infrared (IR) thermography has a diffraction-limited resolution. Moreover, it is impossible to measure sub-surface Tmax residing inside the two-dimensional electron gas of HEMT using IR thermographic measurements. Finite element analysis (FEA) thermal simulations are performed in this study to acquire the surface and sub-surface temperature profiles of the whole MMIC. IR measurements and FEA simulations are integrated through a correlation-based method verifying the accuracy of the FEA-based temperature profiles. This method leads to accurately finding the hotspots in the MMIC, thus revealing the Tmax of both stages. The correlation method using two filters approach to match the measurements and simulated temperature profiles of all the stages finds its application in MMICs’ high-temperature operating lifetime reliability tests.

In AlGaN/GaN high electron mobility transistors (HEMTs), the long-term operation of the device is adversely affected by threshold voltage ( Vth ) instability and current collapse. In this letter, using structural and electrical analyses, the impact of trapping and fluorine (F) inclusion on the device operation is scrutinized. It is found that SiNx interfacial layer significantly reduced the formation of defects, during the ohmic annealing process. Moreover, the incorporation of F ions into GaN bulk, during the gate etch process, triggers the virtual gate phenomenon. This effect has also been mitigated via the pre-gate annealing (PGA) process. As a result of these modifications, a stable operation with minimized lag performance has been achieved.

This paper reports the influence of an ultrathin 1.5 nm atomic-layer-deposited HfO2 blanket layer as a gate dielectric on GaN high-electron-mobility transistors (HEMTs) grown on a 4H-SiC substrate. Transistors with a gate length of 250 nm and a source-to-drain distance of 3 µm were manufactured. The proposed technique involves HfO2 deposition at 250 ∘C prior to the gate metallization with no additional lithography steps. This approach reduced the drain lag by 83% compared to the conventional design with no gate dielectric. The HfO2 layer suppressed the parasitic lateral conduction from the gate, reduced surface trapping, and improved gate electrostatics. The manufactured devices exhibited nearly three orders of magnitude decreased surface leakage, better turn-on behavior, and improved cut-off frequency f T linearity by 16%. High quality metal-oxide interface formation was confirmed by the conductance method. Results demonstrate that the blanket HfO2 deposition is a promising approach to improve the current dispersion characteristics and gate electrostatics of GaN HEMTs without incurring major changes to the established fabrication techniques.

In this article, heat generation distribution and maximum device temperature of gallium-nitride (GaN) high-electron-mobility transistors (HEMTs) are investigated by using the 2-D electrothermal and finite-element method (FEM) simulations. Devices with different gate lengths and source-to-drain spacing are investigated. It is observed that the maximum device temperature (TMAX) depends on the drain-to-source spacing and is almost independent of the gate length and that the assumption of a uniform heat generation region, under the gate, is not accurate; this is contrary to conventional calculation methods. Moreover, based on the results, a new approximation is proposed to use in the FEM simulations that can estimate TMAX more accurately. This method does not require physics-based technology computer-aided design (TCAD) simulations and can work with a low mesh density. The performance is compared with prior methods. This work was supported by Turkish Scientific and Technological Research Council, TUBITAK, under 1501 project GaNTURK. The work of Ekmel Özbay was supported in part by the Turkish Academy of Sciences.

For most semiconductors, especially the visible-light-absorbing ones, the carrier diffusion length is significantly shorter than the light penetration depth, limiting their photoactivities. This limitation could be mitigated through the use of subwavelength semiconductor-based metasurfaces and metamaterials. In this paper, a large-scale compatible metasurface photocathode, made of densely packed disordered p-type chromium oxide (CrOX), is developed to be utilized in photoelectrochemical (PEC) hydrogen generation. For this purpose, first, tightly packed random Cr nanorods are fabricated using an oblique angle deposition technique. Afterward, an annealing step is applied to the sample to transform these metallic units into a semiconducting p-type CrOX-based metasurface. Based on the experimental characterization results and numerical simulations, the proposed design can provide strong light-matter interactions in an ultra-broadband-wavelength range, mainly due to its multidimensional random geometry and ultrasmall gap sizes. Finally, to substantiate the activity of the CrOXnanorods, a core-crown geometry is developed where the NiOXcapping layer catalyzes the hydrogen evolution reaction (HER). The proposed heterostructure metasurface absorber can impose photocurrent values as large as 50 μA cm-2with a photocurrent spectral response extended up to 500 nm. Moreover, the electrode shows outstanding operation under light irradiation for 9 hours. This work demonstrates a simple, scalable design strategy to fabricate low-cost and stable photocathodes for PEC hydrogen evolution. © 2022 American Chemical Society. All rights reserved.

In this work, highly linear AlGaN/GaN laterally gated (or buried gate) high-electron-mobility transistors (HEMTs) are reported. The effect of gate dimensions on source-access resistance and the linearity of laterally gated devices are investigated experimentally in detail for the first time. Transistors with different gate dimensions and conventional planar devices are fabricated using two-step electron beam lithography (EBL). Current–voltage, source-access resistance, small-signal, and two-tone measurements are performed to evaluate the linearity of devices. Contrary to conventional planar HEMTs, the intrinsic transconductance of laterally gated devices monotonically increases with increasing gate voltage, showing a similar behavior as junction field-effect transistors (FETs). The source-access resistance shows a polynomial increase with the drain current, which can be reduced by decreasing the filling ratio of the buried gates. Through the optimization of these two competing factors, i.e., intrinsic transconductance and the source-access resistance, flat transconductance with high linearity is achieved experimentally. The laterally gated structure shows flat transconductance and small-signal power gain over a larger span of gate voltage that is 2.5 times higher than a planar device. Moreover, 6.9-dB improvement in output intercept point (OIP3)/ ${P}_{\text {DC}}$ is achieved. This approach can be used to improve the linearity of AlGaN/GaN HEMTs at the device level.