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In the upcoming video coding standard MPEG-4 AVC/JVT/H.264, motion estimation is allowed to use multiple references and multiple block sizes to improve the rate-distortion performance. However, full exhaustive search of all block sizes is computational intensive with complexity increasing linearly to the number of allowed reference frames and block sizes. In block motion estimation, a search pattern with a different shape or size has a very important impact on search speed and distortion performance. Based on an in-depth examination for the influence of search pattern on speed performance, a novel search algorithm, three-dimensional predict hexagon search (3DPHS), is proposed in this paper. The 3DPHS depends on the characteristics of motion vector distribution; it can predict the object movement in horizontal and vertical direction with a novel search pattern. The proposed algorithm also considers the characteristics of multiple reference frames and multiple block sizes in H.264. The analysis results show that the speed improvement of 3DPHS over some popular fast search algorithms is about 25%-75%. The compression quality is almost the same compared with Full Search. Index Terms--Fast block matching algorithm, H.264, motion estimation.

Motion estimation (ME) in the MPEG-4 AVC/JVT/H.264 video coding standard employs seven permitted block sizes to improve the rate-distortion performance. This novel feature achieves significant coding gain over coding a macroblock using the fixed block size. However, ME is computationally intensive with the complexity increasing linearly with the number of the allowed block sizes. This paper presents an architecture for a combined fast ME algorithm with the predict hexagon search (PHS) and the edge information mode decision (EIMD). The EIMD algorithm utilizes edge information to predict the best block size quickly and precisely. The PHS algorithm searches the best motion vector efficiently. The analytical results reveal that the EIMD+PHS algorithm is 2.4–25 times faster than other popular fast ME algorithms. Additionally, the EIMD+PHS algorithm is 600–2000 times faster than JM10.2, and the peak signal-to-noise ratio degradation is less than 0.15 dB. The proposed architecture applies a large search range and low operation frequency as compared with other popular ME architectures. The proposed architecture only needs 19.4 MHz operating frequency to achieve real-time execution for the general specification of the standard-definition television (720\,\times\,480) used with four reference frames and the search range of 256\,\times\,256. The proposed architecture only requires 116.6 MHz operating frequency to achieve real-time execution for the ultrahigh specification of the quad full high definition (3840\,\times\,2160) used with one reference frame and the search range of 256\,\times\,256. The gate count of the proposed architecture is 300 K, and the memory usage is 12.6 kB. [ABSTRACT FROM AUTHOR]