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In this study, we propose tunable pH sensors based on the electric-double-layer transistor (EDLT) with time-dependent sensitivity characteristics. The EDLT is able to modulate the drain current by using the mobile ions inside the electrolytic gate dielectric. This property allows the implementation of a device with sensitivity characteristics that are simply adjusted according to the measurement time. An extended gate-type, ion-sensitive, field-effect transistor consisting of a chitosan/Ta2O5 hybrid dielectric EDLT transducer, and an SnO2 sensing membrane, were fabricated to evaluate the sensing behavior at different buffer pH levels. As a result, we were able to achieve tunable sensitivity by only adjusting the measurement time by using a single EDLT and without additional gate electrodes. In addition, to demonstrate the unique sensing behavior of the time-dependent tunable pH sensors based on organic–inorganic hybrid EDLT, comparative sensors consisting of a normal FET with a SiO2 gate dielectric were prepared. It was found that the proposed pH sensors exhibit repeatable and stable sensing operations with drain current deviations <1%. Therefore, pH sensors using a chitosan electrolytic EDLT are suitable for biosensor platforms, possessing tunable sensitivity and high-reliability characteristics. [ABSTRACT FROM AUTHOR]

We propose an ambipolar chitosan synaptic transistor that effectively responds to binary neuroplasticity. We fabricated the synaptic transistors by applying a chitosan electric double layer (EDL) to the gate insulator of the excimer laser annealed polycrystalline silicon (poly-Si) thin-film transistor (TFT) with Ni-silicide (NiSi) Schottky-barrier source/drain (S/D) junction. The undoped poly-Si channel and the NiSi S/D contact allowed conduction by electrons and holes, resulting in artificial synaptic behavior in both p-type and n-type regions. A slow polarization reaction by the mobile ions such as anions (CH3COO− and OH−) and cations (H+) in the chitosan EDL induced hysteresis window in the transfer characteristics of the ambipolar TFTs. We demonstrated the excitatory post-synaptic current modulations and stable conductance modulation through repetitive potentiation and depression pulse. We expect the proposed ambipolar chitosan synaptic transistor that responds effectively to both positive and negative stimulation signals to provide more complex information process versatility for bio-inspired neuromorphic computing systems. [ABSTRACT FROM AUTHOR]

With the proliferation of electronic devices and electricity-based mobility solutions, the significance of wireless power transfer technology has increased substantially. However, ensuring secure and reliable power transmission to authorized users remains a significant challenge. Addressing this complex issue requires an integrated approach that balances efficiency, stability, and security considerations. While current efforts primarily focus on improving charging efficiency and user convenience, integrating robust security measures into wireless charging infrastructure is challenging due to its inherently open nature and susceptibility to external interference. Technical advancements are required to strengthen the security of the wireless charging infrastructure; however, these should be balanced with power loss management. This study tackles two core issues: the increasing hardware requirements for billing system authentication protocols and the interception of wireless charging signals by unauthorized users, leading to power theft and subsequent losses. To address these challenges, we propose a mechanism termed "LazyFrog". This mechanism dynamically adjusts the frequency hopping schedule, activating frequency changes only in response to detected threats during remote charging or upon identifying unauthorized access attempts. The proposed mechanism compares the expected power reception at the device with the actual power supplied by the charging station, enabling the detection of abnormal power losses. By minimizing unnecessary frequency changes and optimizing energy consumption, LazyFrog reduces hardware requirements. Moreover, we have implemented a relative distance estimation mechanism to facilitate efficient power transfer as wireless devices move within the charging environment. With these features, LazyFrog demonstrates a secure, flexible, and energy-efficient wireless charging system ready for practical application. [ABSTRACT FROM AUTHOR]

In this study, we enhance the synaptic behavior of artificial synaptic transistors by utilizing nanowire (NW)-type polysilicon channel structures. The high surface-to-volume ratio of the NW channels enables efficient modulation of the channel conductance, which is interpreted as the synaptic weight. As a result, NW-type synaptic transistors exhibit a larger hysteresis window compared to film-type synaptic transistors, even within the same gate voltage sweeping range. Moreover, NW-type synaptic transistors demonstrate superior short-term facilitation and long-term memory transition compared with film-type ones, as evidenced by the measured paired-pulse facilitation and excitatory post-synaptic current characteristics at varying frequencies and pulse numbers. Additionally, we observed gradual potentiation/depression characteristics, making these artificial synapses applicable to artificial neural networks. Furthermore, the NW-type synaptic transistors exhibit improved Modified National Institute of Standards and Technology pattern recognition rate of 91.2%. In conclusion, NW structure channels are expected to be a promising technology for next-generation artificial intelligence (AI) semiconductors, and the integration of NW structure channels has significant potential to advance AI semiconductor technology. [ABSTRACT FROM AUTHOR]

We propose a time-sequential ultraviolet (UV) exposure process that can improve the surface anchoring energy of photopolyimide (PI) embedded with reactive mesogen (RM) in high-speed liquid crystal (LC) display devices. To increase the anchoring energy of the PI layer, a separated UV exposure process of polymerization for the embedded RM material and PI layer is required [1]–[8]. In this paper, we propose a novel single-frequency UV exposure method that can perform the separated polymerization of the UV alignment layer and the embedded RM material by optimizing the intensity of the exposure UV light. Using the proposed UV exposure method, we polymerize the RM material during the first 4 s, and then accomplish the polymerization of the UV alignment layer sequentially. To demonstrate the electro-optical performance, we measure the surface anchoring energy and the optical response time of in-plane switching LC cell. The measured results show that the surface anchoring energy and the optical response time are improved by more than 2.5 times and 28.2%, respectively, compared with the conventional UV exposure. [ABSTRACT FROM AUTHOR]

The flash-based SSD is used as a tiered cache between RAM and HDD. Conventional schemes do not utilize the nonvolatile feature of SSD and cannot cache write requests. Writes are a significant, or often dominant, fraction of storage workloads. To cache write requests, the SSD cache should persistently and consistently manage its data and metadata, and guarantee no data loss even after a crash. Persistent cache management may require frequent metadata changes and causes high overhead. Some researchers insist that a nonvolatile persistent cache requires new additional primitives that are not supported by general SSDs in the market. We proposed a fully persistent read/write cache, which improves both read and write performance, does not require any special primitive, has a low overhead, guarantees the integrity of the cache metadata and the consistency of the cached data, even during a crash or power failure, and is able to recover the flash cache quickly without any data loss. We implemented the persistent read/write cache as a block device driver in Linux. Our scheme aims at virtual desktop infra servers. So the evaluation was performed with massive, real desktop traces of five users for ten days. The evaluation shows that our scheme outperforms an LRU version of SSD cache by 50% and the read-only version of our scheme by 37%, on average, for all experiments. This paper describes most of the parts of our scheme in detail. Detailed pseudo-codes are included in the Appendix. [ABSTRACT FROM AUTHOR]

Software redundant arrays of independent disks (RAID) suffer from several hours of resynchronization time after a sudden power-off. Data blocks and a parity block in a stripe must be updated in a consistent manner. However, a data block may be updated without a parity update if power goes off. Such a partially modified stripe must be updated with a correct parity block after a reboot. It is difficult, however, to find which stripe is partially updated. The widely used traditional parity resynchronization approach entails a very long process that scans the entire volume to find and fix partially updated stripes. As a remedy to this problem, this paper presents a parity resynchronization scheme that exhibits a small overhead for a wide range of workloads, finishes parity resynchronization within several minutes, and is transparent to file systems, thanks to a new seamless block-level journaling. The proposed scheme is integrated into a software RAID driver in a Linux system. A performance evaluation demonstrates that the proposed scheme shortens the resynchronization process from 200 min to 30 s with 1% overhead, compared to 51% overhead for the prior scheme. [ABSTRACT FROM AUTHOR]

Memory contention among consolidated VMs on the same hardware has created the need for repetitive memorybalancing operations. In an attempt to provide a prompt memory balancing mechanism, we found problems with the retardation of memory reallocation by the reclamation delay. The scheduling of the VMs and their VCPUs generates the delay, the dirtiness of the candidate pages for balancing makes the delay fluctuated, and a conflict of two reclamation policies between the guest OS and the hypervisor deteriorates the application performance. As a remedy to these problems, we propose HyperDealer2 (HD2), which selects the victim pages based on the reference patterns of clean pages, reclaims them with hypervisor-level paging, and reallocates those pages with explicit ballooning of the recipient guest OS. HD2 eliminates the involvement of victim VMs inmemory reclamation and extends the dwell time of reclaimed pages in the reclaimed state. Consequently, HD2 significantly reduces the time taken to reallocate memory with a low overhead and enhances the value of additional memory for the recipient VMs. The experimental results of HD2 show that the execution time of memory-intensive applications in the recipient VM is reduced by up to 50 percent in spite of less than 2 percent performance penalty. [ABSTRACT FROM PUBLISHER]

A random network of indium–gallium–zinc oxide (IGZO) nanowires was fabricated by electrospun-polyvinylpyrrolidone (PVP)-nanofiber template transfer. Conventional electrospun nanofibers have been extensively studied owing to their flexibility and inherently high surface-to-volume ratio. However, solution-based IGZO nanofibers have critical issues such as poor electrical properties, reliability, and uniformity. Furthermore, high-temperature calcination, which is essential for vaporizing the polymer matrix, hinders their applications for flexible electronics. Therefore, sputter-based IGZO nanowires were obtained in this study using electrospun PVP nanofibers as an etching mask to overcome the limitations of conventional electrospun IGZO nanofibers. Field-effect transistors (FETs) were fabricated using two types of channels, that is, the nanofiber template-transferred IGZO nanowires and electrospun IGZO nanofibers. A comparison of the transmittance, adhesion, electrical properties, reliability, and uniformity of these two channels in operation revealed that the nanofiber template-transferred IGZO nanowire FETs demonstrated higher transmittance, stronger substrate adhesion, superior electrical performance, and operational reliability and uniformity compared to the electrospun IGZO nanofiber FETs. The proposed IGZO nanowires fabricated by PVP nanofiber template transfer are expected to be a promising channel structure that overcomes the limitations of conventional electrospun IGZO nanofibers. [ABSTRACT FROM AUTHOR]

In an attempt to expand Public Key Infrastructure (PKI) usage to a ubiquitous and mobile computing environment, we found that the deployment of the PKI on a resource-constrained device such as an 8-bit microprocessor leads to user-obstructive latency or additional circuitry for the operations. To alleviate these limitations, we propose a new PKI-based authentication protocol and security infrastructure, namely, PKASSO, which is enhanced with the single sign-on and delegation technology that is used especially for mobile devices with restricted computation power. PKASSO offloads complex PKI operations from the mobile devices to the infrastructure so as to keep the hardware and software complexity of the devices as low as possible. In addition, even though a conventional delegation mechanism cannot support a nonrepudiation mechanism against malicious user behavior, PKASSO can provide such a mechanism by devising a referee server that, on one hand, generates binding information between a device and authentication messages and, on the other hand, retains the information in its local storage for future accusation. We present the detailed design and performance evaluation of PKASSO and offer a protocol analysis in terms of user authentication latency and the completeness of the protocol. According to the performance evaluation, the authentication latency of our infrastructure (which averages 0.082 second) is much shorter than the authentication latency of a conventional PKI-based authentication latency (which averages 5.01 seconds). [ABSTRACT FROM AUTHOR]

In this study, we applied microwave annealing (MWA) to fabricate amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) without thermal damage to flexible polyimide (PI) substrates. Microwave energy is highly efficient for selective heating of materials when compared to conventional thermal annealing (CTA). We applied MWA and CTA to a-IGZO TFTs on PI substrate to evaluate the thermal damage to the substrates. While the PI substrate did not suffer thermal damage even at a high power in MWA, it suffered severe damage at high temperatures in CTA. Moreover, a-IGZO TFTs were prepared by MWA at 600 W for 2 min, whereas the same process using CTA required 30 min at a temperature of 300 °C, which is a maximum process condition in CTA without thermal damage to the PI substrate. Hence, MWA TFTs have superior electrical performance when compared to CTA TFTs, because traps/defects are effectively eliminated. Through instability evaluation, it was found that MWA TFTs were more stable than CTA TFTs against gate bias stress at various temperatures. Moreover, an MWA TFT-constructed resistive load inverter exhibited better static and dynamic characteristics than the CTA TFT-constructed one. Therefore, MWA is a promising thermal process with efficient energy conversion that allows the fabrication of high-performance electronic devices. [ABSTRACT FROM AUTHOR]

Memory devices can be used as storage systems to provide a lower latency that can be achieved by disk and flash storage. However, traditional buffered input/output (I/O) and direct I/O are not optimized for memory-based storages. Traditional buffered I/O includes a redundant memory copy with a disk cache. Traditional direct I/O does not support byte addressing. Memory-mapped direct I/O, which optimizes file operations for byte-addressable persistent memory and appears to the CPU as a main memory. However, it has an interface that is not always compatible with existing applications. In addition, it cannot be used for peripheral memory devices (e.g., networked memory devices and hardware RAM drives) that are not interfaced with the memory bus. This paper presents a new Linux I/O layer, byte direct I/O (BDIO), that can process byte-addressable direct I/O using the standard application programming interface. It requires no modification of existing application programs and can be used not only for the memory but also for the peripheral memory devices that are not addressable by a memory management unit. The proposed BDIO layer allows file systems and device drivers to easily support BDIO. The new I/O achieved 18% to 102% performance improvements in the evaluation experiments conducted with online transaction processing, file server, and desktop virtualization storage. • Buffered I/O requires a disk cache. Direct I/O is not byte-addressable. • Memory-mapped direct file I/O for persistent memory is not compatible for existing applications. • This paper presents a new I/O layer, byte direct I/O (BDIO), in Linux. • BDIO requires no changes of file I/O interface. • BDIO bypasses the page cache even if applications use the buffer I/O interface. • BDIO uses a byte-addressable standard file interface. • BDIO can support peripheral memory devices that cannot be accessed by the MMU. • BDIO was implemented in Linux kernel. [ABSTRACT FROM AUTHOR]

NAND flash memory-based storage devices are vulnerable to errors induced by NAND flash memory cells. Error-correction codes (ECCs) are integrated into the flash memory controller to correct errors in flash memory. However, since ECCs show inherent limits in checking the excessive increase in errors, a complementary method should be considered for the reliability of flash storage devices. In this paper, we propose a scheme based on lossless data compression that enhances the error recovery ability of flash storage devices, which applies to improve recovery capability both of inside and outside the page. Within a page, ECC encoding is realized on compressed data by the adaptive ECC module, which results in a reduced code rate. From the perspective of outside the page, the compressed data are not placed at the beginning of the page, but rather is placed at a specific location within the page, which makes it possible to skip certain pages during the recovery phase. As a result, the proposed scheme improves the uncorrectable bit error rate (UBER) of the legacy system. [ABSTRACT FROM AUTHOR]

Flash-based storage is considered to be a de facto storage module for sustainable Internet of things (IoT) platforms under a harsh environment due to its relatively fast speed and operational stability compared to disk storage. Although their performance is considerably faster than disk-based mechanical storage devices, the read and write latency still could not catch up with that of Random-access memory (RAM). Therefore, RAM could be used as storage devices or systems for time-critical IoT applications. Despite such advantages of RAM, a RAM-based storage system has limitations in its use for sustainable IoT devices due to its nature of volatile storage. As a remedy to this problem, this paper presents a durable hybrid RAM disk enhanced with a new read interface. The proposed durable hybrid RAM disk is designed for sustainable IoT devices that require not only high read/write performance but also data durability. It includes two performance improvement schemes: rapid resilience with a fast initialization and direct byte read (DBR). The rapid resilience with a fast initialization shortens the long booting time required to initialize the durable hybrid RAM disk. The new read interface, DBR, enables the durable hybrid RAM disk to bypass the disk cache, which is an overhead in RAM-based storages. DBR performs byte–range I/O, whereas direct I/O requires block-range I/O; therefore, it provides a more efficient interface than direct I/O. The presented schemes and device were implemented in the Linux kernel. Experimental evaluations were performed using various benchmarks at the block level till the file level. In workloads where reads and writes were mixed, the durable hybrid RAM disk showed 15 times better performance than that of Solid-state drive (SSD) itself. [ABSTRACT FROM AUTHOR]

Nowadays, various computing services are often hosted on cloud platforms for their availability and cost effectiveness. However, such services are frequently exposed to vulnerabilities. Therefore, many countermeasures have been invented to defend against software hacking. At the same time, more complicated attacking techniques have been created. Among them, code-reuse attacks are still an effective means of abusing software vulnerabilities. Although state-of-the-art address space layout randomization (ASLR) runtime-based solutions provide a robust way to mitigate code-reuse attacks, they have fundamental limitations; for example, the need for system modifications, and the need for recompiling source codes or restarting processes. These limitations are not appropriate for mission-critical services because a seamless operation is very important. In this paper, we propose a novel ASLR technique to provide memory rerandomization without interrupting the process execution. In addition, we describe its implementation and evaluate the results. In summary, our method provides a lightweight and seamless ASLR for critical service applications. [ABSTRACT FROM AUTHOR]

Deep neural networks (DNNs) display good performance in the domains of recognition and prediction, such as on tasks of image recognition, speech recognition, video recognition, and pattern analysis. However, adversarial examples, created by inserting a small amount of noise into the original samples, can be a serious threat because they can cause misclassification by the DNN. Adversarial examples have been studied primarily in the context of images, but their effect in the audio context is now drawing considerable interest as well. For example, by adding a small distortion to an original audio sample, imperceptible to humans, an audio adversarial example can be created that humans hear as error-free but that causes misunderstanding by a machine. Therefore, it is necessary to create a method of defense for resisting audio adversarial examples. In this paper, we propose an acoustic-decoy method for detecting audio adversarial examples. Its key feature is that it adds well-formalized distortions using audio modification that are sufficient to change the classification result of an adversarial example but do not affect the classification result of an original sample. Experimental results show that the proposed scheme can detect adversarial examples by reducing the similarity rate for an adversarial example to 6.21%, 1.27%, and 0.66% using low-pass filtering (with 12 dB roll-off), 8-bit reduction, and audio silence removal techniques, respectively. It can detect an audio adversarial example with a success rate of 97% by performing a comparison with the initial audio sample. [ABSTRACT FROM AUTHOR]

Previously, N -acetyl- l -arginine (NALA) suppressed the aggregation of intravenous immunoglobulins (IVIG) more effectively and with a minimum decrease in transition temperature (T m) than arginine monohydrochloride. In this study, we performed a comparative study with etanercept (commercial product: Enbrel®), where 25 mM arginine monohydrochloride (arginine) was added to the prefilled syringe. The biophysical properties were investigated using differential scanning calorimetry (DSC), dynamic light scattering (DLS), size-exclusion chromatography (SEC), and flow-imaging microscopy (FI). NALA retained the transition temperature of etanercept better than arginine, where arginine significantly reduced the T m by increasing its concentration. End-over-end rotation was applied to each formulation for 5 days to accelerate protein aggregation and subvisible particle formation. Higher monomeric content was retained with NALA with a decrease in particle level. Higher aggregation onset temperature (T agg) was detected for etanercept with NALA than arginine. The results of this comparative study were consistent with previous study, suggesting that NALA could be a better excipient for liquid protein formulations. Agitated IVIG and etanercept were injected into C57BL/6J female mice to observe immunogenic response after 24 h. In the presence of silicone oil, NALA dramatically reduced IL-1 expression, implying that decreased aggregation was related to reduced immunogenicity of both etanercept and IVIG. [Display omitted] [ABSTRACT FROM AUTHOR]

Mobile devices such as sensors are used to connect to the Internet and provide services to users. Web services are vulnerable to automated attacks, which can restrict mobile devices from accessing websites. To prevent such automated attacks, CAPTCHAs are widely used as a security solution. However, when a high level of distortion has been applied to a CAPTCHA to make it resistant to automated attacks, the CAPTCHA becomes difficult for a human to recognize. In this work, we propose a method for generating a CAPTCHA image that will resist recognition by machines while maintaining its recognizability to humans. The method utilizes the style transfer method, and creates a new image, called a style-plugged-CAPTCHA image, by incorporating the styles of other images while keeping the content of the original CAPTCHA. In our experiment, we used the TensorFlow machine learning library and six CAPTCHA datasets in use on actual websites. The experimental results show that the proposed scheme reduces the rate of recognition by the DeCAPTCHA system to 3.5% and 3.2% using one style image and two style images, respectively, while maintaining recognizability by humans. [ABSTRACT FROM AUTHOR]

Studies related to pattern recognition and visualization using computer technology have been introduced. In particular, deep neural networks (DNNs) provide good performance for image, speech, and pattern recognition. However, a poisoning attack is a serious threat to a DNN's security. A poisoning attack reduces the accuracy of a DNN by adding malicious training data during the training process. In some situations, it may be necessary to drop a specifically chosen class of accuracy from the model. For example, if an attacker specifically disallows nuclear facilities to be selectively recognized, it may be necessary to intentionally prevent unmanned aerial vehicles from correctly recognizing nuclear-related facilities. In this paper, we propose a selective poisoning attack that reduces the accuracy of only the chosen class in the model. The proposed method achieves this by training malicious data corresponding to only the chosen class while maintaining the accuracy of the remaining classes. For the experiment, we used tensorflow as the machine-learning library as well as MNIST, Fashion-MNIST, and CIFAR10 as the datasets. Experimental results show that the proposed method can reduce the accuracy of the chosen class by 43.2%, 41.7%, and 55.3% in MNIST, Fashion-MNIST, and CIFAR10, respectively, while maintaining the accuracy of the remaining classes. [ABSTRACT FROM AUTHOR]

In this paper, we describe a protocol framework that can perform classification tasks in a privacy-preserving manner. To demonstrate the feasibility of the proposed framework, we implement two protocols supporting Naive Bayes classification. We overcome the heavy computational load of conventional fully homomorphic encryption-based privacy-preserving protocols by using various optimization techniques. The proposed method differs from previous techniques insofar as it requires no intermediate interactions between the server and the client while executing the protocol, except for the mandatory interaction to obtain the decryption result of the encrypted classification output. As a result of this minimal interaction, the proposed method is relatively stable. Furthermore, the decryption key is used only once during the execution of the protocol, overcoming a potential security issue caused by the frequent exposure of the decryption key in memory. The proposed implementation uses a cryptographic primitive that is secure against attacks with quantum computers. Therefore, the framework described in this paper is expected to be robust against future quantum computer attacks. [ABSTRACT FROM AUTHOR]

In an internet of things (IoT) platform with a copious number of IoT devices and active variation of operational purpose, IoT devices should be able to dynamically change their system images to play various roles. However, the employment of such features in an IoT platform is hindered by several factors. Firstly, the trivial file transfer protocol (TFTP), which is generally used for network boot, has major security vulnerabilities. Secondly, there is an excessive demand for the server during the network boot, since there are numerous IoT devices requesting system images according to the variation of their roles, which exerts a heavy network overhead on the server. To tackle these challenges, we propose a system termed FLEX-IoT. The proposed system maintains a FLEX-IoT orchestrater which uses an IoT platform operation schedule to flexibly operate the IoT devices in the platform. The IoT platform operation schedule contains the schedules of all the IoT devices on the platform, and the FLEX-IoT orchestrater employs this schedule to flexibly change the mode of system image transfer at each moment. FLEX-IoT consists of a secure TFTP service, which is fully compatible with the conventional TFTP, and a resource-efficient file transfer method (adaptive transfer) to streamline the system performance of the server. The proposed secure TFTP service comprises of a file access control and attacker deception technique. The file access control verifies the identity of the legitimate IoT devices based on the hash chain shared between the IoT device and the server. FLEX-IoT provides security to the TFTP for a flexible IoT platform and minimizes the response time for network boot requests based on adaptive transfer. The proposed system was found to significantly increase the attack-resistance of TFTP with little additional overhead. In addition, the simulation results show that the volume of transferred system images on the server decreased by 27% on average, when using the proposed system. [ABSTRACT FROM AUTHOR]

Deduplication of encrypted data is a significant function for both the privacy of stored data and efficient storage management. Several deduplication techniques have been designed to provide improved security or efficiency. In this study, we focus on the client-side deduplication technique, which has more advantages than the server-side deduplication technique, particularly in communication overhead, owing to conditional data transmissions. From a security perspective, poison, dictionary, and identification attacks are considered as threats against client-side deduplication. Unfortunately, in contrast to other attacks, identification attacks and the corresponding countermeasures have not been studied in depth. In identification attacks, an adversary tries to identify the existence of a specific file. Identification attacks should be countered because adversaries can use the attacks to break the privacy of the data owner. Therefore, in the literature, some counter-based countermeasures have been proposed as temporary remedies for such attacks. In this paper, we present an analysis of the security features of deduplication techniques against identification attacks and show that the lack of security of the techniques can be eliminated by providing uncertainness to the conditional responses in the deduplication protocol, which are based on the existence of files. We also present a concrete countermeasure, called the time-locked deduplication technique, which can provide uncertainness to the conditional responses by withholding the operation of the deduplication functionality until a predefined time. An additional cost for locking is incurred only when the file to be stored does not already exist in the server's storage. Therefore, our technique can improve the security of client-side deduplication against identification attacks at almost the same cost as existing techniques, except in the case of files uploaded for the first time. [ABSTRACT FROM AUTHOR]

Research on various security technologies has been actively underway to protect systems from attackers. However, attackers can secure enough time to reconnoiter and attack the target system owing to its static nature. This develops asymmetric warfare in which attackers outwit defenders. Moving target defense (MTD) technologies, which obfuscate the attack surface by modifying the main properties of the potential target system, have been gaining attention as an active cyber security technology. Particularly, network-based MTD (NMTD) technologies, which dynamically mutate the network configuration information, such as IP and ports of the potential target system, can dramatically increase the time required for an attacker to analyze the system. Therefore, this system defense technology has been actively researched. However, increasing the analysis complexity of the target system is limited in conventional NMTD because the variation of system properties (e.g., IP, port) that can be mutated is restricted by the system configuration environment. Therefore, there is a need for an MTD technique that effectively delays an attacker during the system analysis by increasing the variation of system properties. Additionally, in terms of practicality, minimizing the computational overhead arising by the MTD technology and solving the compatibility problem with existing communication protocols are critical issues that cannot be overlooked. In this study, we propose a technology called Ghost-MTD (gMTD). gMTD allows only the user who is aware of protocol mutation patterns to correctly communicate with the service modules of the server system through protocol mutation using the pre-shared one-time bit sequence. Otherwise, gMTD deceives the attackers who attempt to infiltrate the system by redirecting their messages to a decoy-hole module. The experimental results show that the proposed technology enables protocol mutation and validation with a very low performance overhead of only 3.28% to 4.97% using an m-bit (m ≥ 4) length one-time bit sequence and can be applied to real systems regardless of the specific communication protocols. [ABSTRACT FROM AUTHOR]