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High-speed digitizers operating at sampling rates higher than 10GS/s require low-pass anti-aliasing filters in the multi-GHz range. Asynchronous Time-Interleaved (ATI) digitizers also need low-pass filters before digitization, and additional requirements on their design are set by this specific application. In integrated solutions, inductor-less filters are important for minimizing the chip area footprint. In this paper, we present the design of a 6th-order inductor-less 10GHz low-pass filter implemented in the STMicroelectronics SiGe BiCMOS55 process. It can be used as anti-aliasing filter for conventional 30GS/s digitizers or at the output of a 40GS/s ATI digitizer. We exploit positive feedback to synthesize the active inductor based on a stacked topology, minimizing the number of current branches, and thus power consumption. Analysis and design guidelines for the biquad are presented. The filter exhibits a bandwidth of 10GHz with a power consumption of 43mW, a THD of -45dB and an SNR of 43dB with an input amplitude of 710mV peak-to-peak differential. Extensive corner and Monte Carlo post-layout simulations have been carried out to highlight the robustness of the circuit to PVT and mismatch variations. Experimental results have confirmed very good agreement between measured and simulated performance, validating the proposed design flow.

In this work, an ultra-low-voltage (ULV) technique to improve body-driven current mirrors is proposed. The proposed technique is employed to improve the performance of conventional differential-to-single-ended (D2S) converters which at these low voltages suffer from a low common-mode rejection ratio (CMRR). In addition, the technique aims to improve the performance of the conventional D2S also under a large signal swing and with respect to the process, voltage and temperature (PVT) variations, resulting in a very low distortion, high current mirror accuracy and robust performance. An enhanced body-driven current mirror was designed in a 130nm CMOS technology from STMicroelectronics and an exhaustive campaign of simulations was conducted to confirm the effectiveness of the strategy and the robustness of the results. The enhanced D2S was also employed to design a ULV operational transconductance amplifier (OTA) and a comparison with an OTA based on a conventional D2S was provided. The simulation results have shown that the proposed enhanced D2S allows achieving the ULV OTAs with a CMRR and a PSRR which are 18 and 9 dB higher than the ones obtained with the conventional D2S topology, respectively. Moreover, the linearity performance is also improved as shown by the THD, whose value is decreased of about 5 dB.

Volterra models allow modeling nonlinear dynamical systems, even though they require the estimation of a large number of parameters and have, consequently, potentially large computational costs. The pruning of Volterra models is thus of fundamental importance to reduce the computational costs of nonlinear calibration, and improve stability and speed, while preserving accuracy. Several techniques (LASSO, DOMP and OBS) and their variants (WLASSO and OBD) are compared in this paper for the experimental calibration of an IF amplifier. The results show that Volterra models can be simplified, yielding models that are 4–5 times sparser, with a limited impact on accuracy. About 6 dB of improved Error Vector Magnitude (EVM) is obtained, improving the dynamic range of the amplifiers. The Symbol Error Rate (SER) is greatly reduced by calibration at a large input power, and pruning reduces the model complexity without hindering SER. Hence, pruning allows improving the dynamic range of the amplifier, with almost an order of magnitude reduction in model complexity. We propose the OBS technique, used in the neural network field, in conjunction with the better known DOMP technique, to prune the model with the best accuracy. The simulations show, in fact, that the OBS and DOMP techniques outperform the others, and OBD, LASSO and WLASSO are, in turn, less efficient. A methodology for pruning in the complex domain is described, based on the Frisch–Waugh–Lovell (FWL) theorem, to separate the linear and nonlinear sections of the model. This is essential because linear models are used for equalization and cannot be pruned to preserve model generality vis-a-vis channel variations, whereas nonlinear models must be pruned as much as possible to minimize the computational overhead. This methodology can be extended to models other than the Volterra one, as the only conditions we impose on the nonlinear model are that it is feedforward and linear in the parameters.

The use of capacitive sensors has advantages in different industrial applications due to their low cost and low-temperature dependence. In this sense, the current-mode approach by means of second-generation current conveyors (CCIIs) allows for improvements in key features, such as sensitivity and resolution. In this paper, a novel architecture of CCII for differential capacitive sensor interfaces is presented. The proposed topology shows a closed-loop configuration for both the voltage and the current buffer, thus leading to better interface impedances at terminals X and Z. Moreover, a low power consumption of 600 µW was obtained due to class-AB biasing of both buffers, and the inherent drawbacks in terms of linearity under the mismatch of class-AB buffering are overcome by its closed-loop configuration. The advantages of the novel architecture are demonstrated by circuit analysis and simulations; in particular, very good robustness under process, supply voltage and temperature variations and mismatches were obtained due to the closed-loop approach. The CCII was also used to design a capacitive sensor interface in integrated CMOS technology, where it was possible to achieve a sensitivity of 2.34 nA/fF, with a full-scale sensor variation of 8 pF and a minimum detectable capacitance difference of 40 fF.

The aim of this paper is to prove that, through a canonic approach, sinusoidal oscillators based on second-generation voltage conveyor (VCII) can be implemented. The investigation demonstrates the feasibility of the design results in a pair of new canonic oscillators based on negative type VCII (VCII−). Interestingly, the same analysis shows that no canonic oscillator configuration can be achieved using positive type VCII (VCII+), since a single VCII+ does not present the correct port conditions to implement such a device. From this analysis, it comes about that, for 5-node networks, the two presented oscillator configurations are the only possible ones and make use of two resistors, two capacitors and a single VCII−. Notably, the produced sinusoidal output signal is easily available through the low output impedance Z port of VCII, removing the need for additional voltage buffer for practical use, which is one of the main limitations of the current mode (CM) approach. The presented theory is substantiated by both LTSpice simulations and measurement results using the commercially available AD844 from Analog Devices, the latter being in a close agreement with the theory. Moreover, low values of THD are given for a wide frequency range.

The implementation of backhauling links poses several challenges to the designers which are requested to limit the hardware costs in the framework of complex millimeter wave radio systems. This work presents a monolithically integrated E-band I/Q receiver covering the whole bandwidth from 71 to 86 GHz. The chip was implemented in a 55 nm SiGe BiCMOS technology which allows reaching a high level of integration. The receiver is based on a Low Noise Amplifier (LNA) stage and a Variable-Gain Amplifier (VGA) which provide a −11 dBm IP1dB. A double balanced mixer provides I/Q baseband outputs through a reduced-size differential phase shifter which allows to contain the chip size to 1.8 mm2.

Analysis, design, and characterization of an E-band Variable Gain Amplifier (VGA) in SiGe BiCMOS commercial technology is presented. VGA topologies are compared in terms of their capability to contribute to receiver linearity and dynamic range. The proposed VGA is based on a Gilbert multiplier cell exploiting current cancellation to enhance control range and linearity. A 1 dB bandwidth ranging from 80 to 100 GHz, a 24 dB gain control range and a −11.5 dBm input 1 dB compression point have been measured.

A power efficient static frequency divider in commercial 55 nm SiGe BiCMOS technology is reported. A standard Current Mode Logic (CML)-based architecture is adopted, and optimization of layout, biasing and transistor sizes allows achieving a maximum input frequency of 63 GHz and a self-oscillating frequency of 55 GHz, while consuming 23.7 mW from a 3 V supply. This results in high efficiency with respect to other static frequency dividers in BiCMOS technology presented in the literature. The divider topology does not use inductors, thus optimizing the area footprint: the divider core occupies 60 &times, 65 &mu, m2 on silicon.

We present a low voltage approach to design an adaptive bias circuit for a class-AB input stage, and exploit it to design a fully-differential 0.6 V class-AB symmetrical OTA that also features cascode dynamic biasing and a class-AB CMFB circuit. Simulations in 0.13 μm CMOS technology show a 42x increase of the bias current when signal is applied, that yields a faster settling time with respect to a class-A OTA designed with the same static current. The OTA provides 43.6 dB gain and good large-signal FOM when compared with sub-1 V OTAs in the literature, and is still operational at 0.4 V supply voltage.

In this work, we present a low-power 2nd order band-pass filter for neural recording applications. The central frequency of the passband is set to 375Hz and the quality factor to 5 to properly process the neural signals related to the onset of epileptic seizure, and to strongly attenuate all the out of band biological signals and electrical disturbances. The biquad filter is based on a fully differential Tow Thomas architecture in which high-valued resistors are implemented through switched high-resistivity polysilicon resistors. A supply voltage as low as 0.8V and MOS transistors operating in the sub-threshold region are exploited to achieve a power consumption as low as 170nW, when driving a 1pF load capacitance. The filter exhibits a tuning range of the resonance frequency from 200Hz to 400Hz, and an area footprint of only 0.021 mm2. Very low power consumption and area occupation are key specifications for integrated, multiple-sensors, neural recording systems., Biomedical engineering; Electrical engineering; Neuroscience; Signal processing; Wireless network; Very-large-scale integration; Neural recording; Low-power; Switched resistors filter; Brain-computer interface; Area efficient.

An improvement of a standard fully differential class-AB symmetrical operational transconductance amplifier (OTA) topology is proposed in this brief to enhance the common-mode behavior. Common-mode behavior could be critical in fully differential class-AB OTAs, where the total current is not fixed and differential to common-mode conversion could therefore be present. A signal proportional to the input common-mode component is generated through a simple low-current auxiliary amplifier and used to modulate a bias voltage, achieving cancellation of the output common-mode component. Simulations in 40-nm CMOS technology show a net improvement of common-mode rejection ratio without affecting differential-mode behavior; the increase in area and power consumption is minimal, with a tradeoff between power and settling time. Simulations of a sample-and-hold exploiting the proposed OTA are presented.

A class-AB OTA (operational transconductance amplifier) topology with rail-to-rail input common-mode range is proposed for application in very low-voltage applications. High efficiency is achieved by reusing transistors both for class-AB operation and for mirroring the output currents, and a threshold lowering technique is applied to allow supply voltages less than two threshold voltages. Simulations in 40 nm CMOS technology show 41 dB gain at ±0.3 V supply voltage, a unity-gain frequency of 8.8 MHz on a 5 pF load, class-AB behaviour and full rail-to-rail operation when closed in unity-gain buffer configuration.

Multi-GHz lowpass filters are key components for many RF applications and are required for the implementation of integrated high-speed analog-to-digital and digital-to-analog converters and optical communication systems. In the last two decades, integrated filters in the Multi-GHz range have been implemented using III-V or SiGe technologies. In all cases in which the size of passive components is a concern, inductorless designs are preferred. Furthermore, due to the recent development of high-speed and high-resolution data converters, highly linear multi-GHz filters are required more and more. Classical open loop topologies are not able to achieve high linearity, and closed loop filters are preferred in all applications where linearity is a key requirement. In this work, we present a fully differential BiCMOS implementation of the classical Sallen Key filter, which is able to operate up to about 10 GHz by exploiting both the bipolar and MOS transistors of a commercial 55-nm BiCMOS technology. The layout of the biquad filter has been implemented, and the results of post-layout simulations are reported. The biquad stage exhibits excellent SFDR (64 dB) and dynamic range (about 50 dB) due to the closed loop operation, and good power efficiency (0.94 pW/Hz/pole) with respect to comparable active inductorless lowpass filters reported in the literature. Moreover, unlike other filters, it exploits the different active devices offered by commercial SiGe BiCMOS technologies. Parametric and Monte Carlo simulations are also included to assess the robustness of the proposed biquad filter against PVT and mismatch variations.

A Cognitive Radar, working in a frequency dense environment, has to perform effective wideband operations, spanning several frequency channels, by working in parallel with other radar and/or communication systems. The cognitive operation is possible by modeling the channel behavior and predicting future channel occupancy. The model of the electromagnetic environment is based on the observation of the spectrum occupancy during a number of time slots and on suitable machine learning to acquire the characteristics of the channel occupancy. The learning operation is paramount, as the prediction about channel occupancy is possible only after understanding the behavior of the concurrent emitters present in the scenario. This paper describes the concept of machine learning techniques, based on emitter pattern classification and matching. implemented on a number of real cases of emitter behavior. In particular, we are defining these techniques by considering four real cases of emitter behavior, namely fixed, sequential, periodical and random channel acquisition. We show that, in the above examined cases, our machine learning techniques can provide good emitter matching, even in presence of a consistent number of concurrent transmitters.

The need to estimate in real time a large frequency spectrum, in order to detect the presence of narrowband emitters within a certain frequency area, is relevant in many applications, in particular those related to cognitive radar. The goal of spectrum monitoring is to analyze the whole wide spectrum in real time. This paper starts from previously proposed solutions, based on correlating the undersampled signals of only two asynchronous channels. The drawback of this solution is that, in specific cases, some ambiguities may occur along the estimated spectrum, due to the casual overlapping of some aliased tones, produced by undersampling. This paper demonstrates that, by the use of multiple channels and suitable correlation algorithms, the above ambiguities can be cancelled and the final spectrum estimation comes out to be correct.

This paper presents a fully differential class-AB current mirror OTA that improves the common-mode behavior of a topology that presents very good differential-mode performance but poor common-mode rejection ratio (CMRR). The proposed solution requires a low-current auxiliary circuit driven by the input signal, to compensate the effect of the common-mode input component. Simulations in 40-nm CMOS technology show a net reduction of common-mode gain of more than 90[Formula: see text]dB without affecting the differential-mode behavior; a sample-and-hold amplifier exploiting the proposed amplifier has also been simulated.

A methodology to design high-power amplifiers composed of several amplifier blocks and passive combiners/dividers is proposed.The optimum matching condition between amplifiers and combiners has been found using the mixed-mode S-parameters approach. Measurements and computer-aided design simulations have been successfully used to validate the proposed approach. © 2013 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:1500–1504, 2013; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27600

An analytic design-oriented model of phase and frequency modulated microwave optical links has been developed. The models are suitable for design of broadband high dynamic range optical links for antenna remoting and optical beamforming, where noise and linearity of the subsystems are a concern Digital filter design techniques have been applied to the design of optical filters working as frequency discriminator, that are the bottleneck in terms of linearity for these systems. The models of frequency modulated, phase modulated, and coherent I/Q link have been used to compare performance of the different architectures in terms of linearity and SFDR.

This paper presents and evaluates, by simulation, the feasibility of a new type of spectrum controlled waveforms for use in a cognitive radar operating in a spectrally dense environment. The addressed scenario is constituted of a wideband radar with cognitive functionalities and a number of narrow band communication services working in frequency hopping mode. The paper proposes the use of a special type of waveform, namely Adaptive Spectrum Controlled Waveform (ASCW), which can carry out the cognitive functionalities of the wideband radar, by using the frequency nulling technique to minimize the effect of the interference of the coexisting communication services.

Two novel process variations aware, necessary and sufficient conditions suitable for implementation in CAD optimizers are proposed to check amplifiers stability. Case studies are presented, showing that the new criteria allow robust amplifier design, under variation of active device immittance parameters in pre-specified rectangular regions, due to manufacturing tolerances. © 2012 Wiley Periodicals, Inc. Int J RF and Microwave CAE 23: 619–626, 2013.

In this article, a statistical nonlinear model of GaAs HEMT MMICs based on standard CAD library models is presented. A previously developed extraction procedure is used to determine model parameters. Extraction and CAD implementation of the model in 1–50 GHz frequency range provide validation of both the statistical model and the extraction procedure. © 2009 Wiley Periodicals, Inc. Microwave Opt Technol Lett 51: 2163–2166, 2009; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24543

One of the critical functions of a cognitive radar is to examine a large frequency spectrum in real time, in order to detect the presence of narrowband emitters, which radiate on the same frequencies as a wideband radar. The final goal of spectrum monitoring is to recognize which frequency channels of the radar spectrum are occupied over a certain time period. In order to analyze the whole wide spectrum in real time, the time signal samples must be collected at a much lower rate than the Nyquist rate corresponding to the highest frequency of the considered spectrum. This paper proposes a novel approach based on the suitable correlation and averaging of a number of parallel asynchronous channels, each of which is heavily undersampled with respect to the Nyquist rate. We demonstrate that the analysis of the large spectrum is possible by applying our approach by using a limited number of asynchronous channels.

New criteria to check conditional stability of microwave amplifiers with input and output terminations varying in pre-specified circular regions surrounding complex nominal values are proposed. Necessary and sufficient conditions are provided both in terms of the immittance parameters /spl lambda//sub ij/ (i.e., z/sub ij/,y/sub ij/,g/sub ij/, or h/sub ij/) and in terms of the scattering parameters s/sub ij/. Proposed conditions can be easily implemented in any commercial computer-aided design tool and are suitable to be used as design goals within an optimization routine: this allows to optimize the tradeoff between stability constraints under termination variations and performance in a yield-oriented design flow. A case study, in which a distributed amplifier has been designed, shows the advantages of the proposed approach.

The paper deals with a possible use of the feed array present in a large antenna system, as a layer for measuring the antenna performance with a self-test procedure and a possible way to correct residual errors of the Antenna geometry and of the antenna distortions. Focus has been concentrated on a few key critical elements of a possible feed array metrology program. In particular, a preliminary contribution to the design and development of the feed array from one side, and the subsystem dedicated to antenna distortion monitoring and control from the other, have been chosen as the first areas of investigation. Scalability and flexibility principles and synergic approach with other coexistent technologies have been assumed of paramount importance to ensure ease of integrated operation and therefore allowing in principle increased performance and efficiency. The concept is based on the use of an existing feed array grid to measure antenna distortion with respect to the nominal configuration. Measured data are then processed to develop a multilayer strategy to control the mechanical movable devices (when existing) and to adjust the residual fine errors through a software controlled phase adjustment of the existing phase shifter The signal from the feed array is converted passing through a FPGA/ASIC level to digital data channels. The kind of those typically used for the scientific experiments. One additional channel is used for monitoring the antenna distortion status. These data are processed to define the best correction strategy, based on a software managed control system capable of operating at three different levels of the antenna system: reflector rotation layer, sub reflector rotation and translation layer (assuming the possibility of controlling a Stewart machine), phase shifter of the phased array layer. The project is at present in the design phase, a few elements necessary for a sound software design of the control subsystem have been developed at a technological demonstrator level while the ASIC board for generating the digital data stream has been fully developed. A prototype for control accurately the position of the sub-reflector up to a diameter of 5 meters (similar to the sub reflector size of a large antenna) using a Stewart mechanism is being planned. The selection strategy of the correction modes will depend on the dynamics of the phased array (i.e. the available bits of the A/D conversion). The reaction time allowed for the correction, depending on the error type and the inertia of the sub systems. Typically, the compensation can be divided among all the adjusting elements.

The paper deals with the opportunity to introduce “Not strictly TEM waves” Synthetic detection Method (NTSM), consisting in a Three Axis Digital Beam Processing (3ADBP), to enhance the performances of radio telescope and sensor systems. Current Radio Telescopes generally use the classic 3D “TEM waves” approximation Detection Method, which consists in a linear tomography process (Single or Dual axis beam forming processing) neglecting the small z component. The Synthetic FEED ARRAY three axis Sensor SYSTEM is an innovative technique using a synthetic detection of the generic “NOT strictly TEM Waves radiation coming from the Cosmo, which processes longitudinal component of Angular Momentum too. Than the simultaneous extraction from radiation of both the linear and quadratic information component, may reduce the complexity to reconstruct the Early Universe in the different requested scales. This next order approximation detection of the observed cosmologic processes, may improve the efficacy of the statistical numerical model used to elaborate the same information acquired. The present work focuses on detection of such waves at carrier frequencies in the bands ranging from LF to MMW. The work shows in further detail the new generation of on line programmable and reconfigurable Mixed Signal ASIC technology that made possible the innovative Synthetic Sensor. Furthermore the paper shows the ability of such technique to increase the Radio Telescope Array Antenna performances.

Emerging low-power radio triggering techniques for wireless motes are a promising approach to prolong the lifetime of Wireless Sensor Networks (WSNs). By allowing nodes to activate their main transceiver only when data need to be transmitted or received, wake-up-enabled solutions virtually eliminate the need for idle listening, thus drastically reducing the energy toll of communication. In this paper we describe the design of a novel wake-up receiver architecture based on an innovative pass-band filter bank with high selectivity capability. The proposed concept, demonstrated by a prototype implementation, combines both frequency-domain and time-domain addressing space to allow selective addressing of nodes. To take advantage of the functionalities of the proposed receiver, as well as of energy-harvesting capabilities modern sensor nodes are equipped with, we present a novel wake-up-enabled harvesting-aware communication stack that supports both interest dissemination and converge casting primitives. This stack builds on the ability of the proposed WuR to support dynamic address assignment, which is exploited to optimize system performance. Comparison against traditional WSN protocols shows that the proposed concept allows to optimize performance tradeoffs with respect to existing low-power communication stacks.

In this paper we present a methodology to calibrate and correct frequency-dependent errors in phased-array antennas with large signal bandwidth and large size. If the receivers are not narrow-band, the hypotheses of constant gain and group delay are not valid. If the frequency responses of the receivers are affected by mismatches, this will also impact directivity. Standard Amplitude and Phase Correction (APC) algorithms will not be effective in this case, and a more advanced complex FIR filtering algorithm is used. A transmitted signal is assumed to be known in order to provide a reference and estimate the optimal calibration coefficients of the FIR filters.

A novel topology of lossy equalizer with impedance transformation and stabilization capability is presented, which allows the design of broadband very high-linearity and high-power amplifiers. Design equations are presented and used to design a 1-2.4 GHz 60W composite amplifier exploiting push-pull configuration.

A novel architecture for optical beamforming is presented, and its implementation as an integrated multi-chip system is discussed. Modeling and design methodology of the key components of the system, i.e. the linearized electro-optic external modulator and the array of tunable true delay lines, is detailed. Measurements on a linearized modulator are presented to demonstrate the feasibility of the proposed design approach.

This paper describes a complete 3R optical receiver module for synchronous digital hierarchy (SDH) STM-16 short-haul systems, housed in a 20-pin dual-in-line (DIL) ceramic package. The module includes an InGaAs p-i-n photodiode, a commercial GaAs transimpedance amplifier, and a custom-made silicon bipolar frequency- and phase-locked loop (FPLL)-based clock and data recovery (CDR) circuit. The fiber pigtail is actively aligned to the photodiode by using a proprietary technology that uses a silicon-based optical submount assembly (OSA). The use of a clock recovery circuit based on an FPLL allows avoiding an external low-frequency reference clock and achieving a root-mean square (rms) jitter of 0.075 UI. The module requires two supply voltages of 5 V and -4.5 V, for a total power dissipation of 930 mW, and has a total volume below 0.75 cm/sup 3/ (24.7/spl times/9.9/spl times/3 mm/sup 3/). Measurements have shown full compatibility with SDH standards.

A nonlinear lumped-element model of MESFET and HEMT devices whose parameters are empirical functions of instantaneous voltages at the controlling internal nodes has been developed and used to design an X-band hybrid amplifier. Excellent agreement between measurements and simulated performance in small-signal and nonlinear power characteristics has been obtained. © 2001 John Wiley & Sons, Inc. Microwave Opt Technol Lett 29: 187–190, 2001.