Search

The approach to designing field-programmable logic arrays is not a one principle process. It consists of numerous steps that should be religiously followed in order to ensure that the design package contains the specific defined logic and that it does the job it was designed to do. The specific function neededmust be determined, also ensure that the FPGA (field programmable gate arrays) are compatible to the logic required and will perform its intended use. The stages of logic design are discussed further.

High-performance PLDs come in a variety of flavors. To choose the right one, consider the speed and time-to-market requirements of your application and learn what each PLD architecture offers. Designing [...]

FPGA density and performance are rapidly increasing. As a result, designing with an FPGA closely resembles working with complex-gate-array or cell-based chips. You need to choose the synthesis and other [...]

Using an FPGA adds to the flexibility and can cut the time to market. The PCI bus specification at either 32 or 64 bits calls for two types of peripherals: […]

The utility of computer-aided design packages in the design of field programmable gate arrays is investigated with respect to other electronically programmable logic devices. Several factors related to the growing use of hardware description language and logic synthesistools for high-level graphical design are examined. It is shown that further developments in the two fields will focus on cost reduction plus enhancement ofspeed, density and device properties.

A wideband 8x4 crosspoint array - Part 2 Figure 1 shows the circuit diagram of the DG884, together with Si581 input buffering the Si582 output gain of two amplifiers. The [...]

Intec Systems Inc., Manalapan, N.J., is offering Sonet/SDH IP cores for Altera Corp.'s Stratix FPGAs. Available through San Jose-based Altera's Megafunction Partners Program, they include frame-mapped generic framing procedure, transparent-mapped […]

The most significant development in programmable-logic technology is the emergence of the programmable system-on-chip. These reconfigurable, system-level devices, now available from a number of FPGA vendors, include both hard and […]

Reconfigurable computing based on conventional FPGA technology has been around for the past decade, most of that time as a research project. There have been no substantial commercial successes, although […]

By bringing together the right process management, design entry, simulation and synthesis tools, engineers now can build a methodology that supports mixed schematic and language-based design for field-programmable gate arrays […]

Sunnyvale, Calif. As a grizzled veteran of the FPGA gate-counting wars, I have seen the industry graduate from using gates to equivalent ASIC gates and onto FPGA gates as a […]

Marlboro, Mass. A curious phenomenon is happening in the world of programmable logic design. Advances in silicon technology are causing changes in the way system design is done. As field […]

NEW LIFE FOR AN OLD PART The hot new high-volume logic market that has semiconductor houses rubbing their hands in anticipation is not so new at all. But process and […]

Tackle real-time DSP tasks with CMOS chip set Manipulating high-frequency signals in real time demands high computatonal throughput from the digital ICs doing the processing. It also burdens the I/O […]

Dense programmable logic chips away at gate arrays Like a child emptying the cookie jar little by little, programmable logic devices, or PLDs, are stealing away portions of the market […]

High-performance logic arrays loaded with up to 3500 gates and sporting delays of just 275 ps have whetted the industry's appetite for data storage with the speed to match. Until […]

Conventional EEPROMs and flash EEPROMs offer a spectrum of bit densities Applications abound for nonvolatile memory devices capable of occasional reprogramming. The storage of frequently used numbers in telephone equipment, [...]

Programmable Logic Devices Although programmable logic devices (PLDs) have been around for over a decade, engineers have recently begun to use them at geometrically increasing rates. PLD makers have responded [...]

The registered PROM can replace PALs in large state machines Designers tend to neglect the registered PROM (RPROM) when constructing sequential digital systems. Instead, they turn to PALs and the [...]

System designers are coming to learn that efficient use of intellectual property (IP)--pre-created designs that can be easily integrated into a system-level chip--shortens the design cycle and enables them to […]

Cambridge, Ma-based Virtual Machine Works Inc. has developed a timing and communications scheme which enables field programmable gate arrays (FPGAs) to implement a much explored system concept, called reconfigurable hardware. […]

Reconfigurable array eases development Sample quantities of silicon together with development systems are now available to enable design engineers to use Plessey Semiconductors' electrically reconfigurable array (ERA) to produce a [...]

GET GATE-ARRAY PLIABILITY WITH PROGRAMMABLE CHIP Over the last few years, programmable logic devices progressed from simple chips with limited flexibility to complex devices that are achieving gate-array-like malleability. To […]

Electronic-equipment manufacturers are looking for customized IC solutions that make allowances for product differentiation in a crowded and competitive market. FPGAs provide the advantages of custom large- scale integration, such […]

There is little argument that the use of programmable- logic devices has grown exponentially in the past year. Perhaps the most marked increase has been realized with field-programmable gate arrays […]

The next frontier on the horizon for reconfigurable hardware, which is already a booming, billion-dollar business for FPGA companies, is mainstream reconfigurable computing (MRC)-the application of reconfigurable hardware to increase […]

As the argument rages on about whether high-gate-count FPGAs can replace ASICs in certain applications, many in the industry have overlooked hybrid devices that offer designers the strengths of each. […]

Vantis, the programmable-logic subsidiary of AMD (Sunnyvale, CA), enters the market for high-gate-count FPGAs with the SRAM-based VF1 family. VF1 devices have 12,000 to 36,000 logic gates. Additionally, the devices [...]