1. A defect tolerance scheme for nanotechnology circuits
- Author
-
Yamani, Ahmad A. Al-, Ramsundar, Sundarkumar, and Pradhan, Dhiraj K.
- Subjects
Algorithms -- Usage ,Nanotechnology -- Research ,Reliability (Engineering) -- Evaluation ,Circuit design -- Research ,Algorithm ,Circuit designer ,Integrated circuit design ,Business ,Computers and office automation industries ,Electronics ,Electronics and electrical industries - Abstract
Lithography-based integrated circuit fabrication is rapidly approaching its limit in terms of feature size. The current alternative is nanotechnology-based fabrication, which relies on self-assembly of nanotubes or nanowires. Such a process is subject to a high defect rate, which can be tolerated using carefully crafted defect tolerance techniques. This paper presents an algorithm for reconfiguration-based defect tolerance in nanotechnology switches. The algorithm offers an average switch density improvement of 50% to 100% to most recently published techniques. The algorithm is also consistent in improving the yield through minimizing false rejects as the results show over a large sample. The improvement percentage varies depending on the manufactured switch size and the desired defect-free size with the improvement in efficiency directly proportional to the size of the switch. Index Terms--Cross bar switches, defect tolerance, fault tolerance, nanotechnology, reliability.
- Published
- 2007