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One of the key enablers for the successful integration of 3-D interconnects using the Through-Silicon Via (TSV) schemes is the control of the mechanical stresses in the Cu TSV itself as well as in the surrounding silicon substrate. The synchrotron-sourced X-ray microdiffraction technique has been recognized to allow some important advantages compared to other techniques in characterization of the mechanical stresses in a TSV sample. This approach have been used to study Cu TSV samples from SK Hynix, Inc. earlier as well as more recently from SEMATECH, and we have found interesting differences in the stress states of the Cu TSV. We proposed a possible explanation of the observed differences. This fundamental understanding could lead to improved stress control and hence reliability in the Cu TSV samples, as well as to reduce its impact to the silicon electron mobility and hence to device performance in general.

This paper highlights some of the key challenges for the Quality and Reliability of semiconductor components based on field return data and root cause Pareto analysis. Some key learnings are discussed. The paper also discusses the topic of the role of organizations, its tasks and infrastructure necessary to achieve the required IC component quality and reliability. Specific examples are discussed. In the second part of this paper we discuss and summarize some of the reliability challenges experienced from the perspective of a customer for fabless semiconductor companies.

Work showing evidence of a shift in the Stress Migration (SM) peak profile temperature for smaller interconnect linewidths typically associated with the 32 nm technology node and beyond is presented here. With other parameters (fabrication, materials, line thickness and via diameter being kept nominal among all these samples), this clear shift towards the lower temperatures for smaller linewidths appear to indicate a size effect in the Stress Migration in advanced Cu interconnect scheme. The synchrotron x-ray micro-diffraction experiment, is used to show that plasticity is involved in the stress relaxation process at about 200° C, but not at higher temperature nor at room temperature. Such plasticity-assisted strain relaxation in interconnects especially at lower temperature range could explain the critical temperature shift observed in the present study, in addition to the typical diffusion-assisted mechanism. Further, the synchrotron X-ray micro-diffraction experiments also suggests indications of plasticity-assisted voiding. Numerical finite element analyses were also conducted in conjunction with the experimental study, to provide greater insight. The modelling result demonstrates the importance of creep plasticity in causing thermal stress relaxation in Cu interconnects.