139 results on '"Reyhani-Masoleh, Arash"'
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2. Improving performance of FPGA-based SR-latch PUF using Transient Effect Ring Oscillator and programmable delay lines
3. On Countermeasures Against Fault Attacks on Elliptic Curve Cryptography Using Fault Detection
4. A Modified Low Complexity Digit-Level Gaussian Normal Basis Multiplier
5. Digit-Serial Structures for the Shifted Polynomial Basis Multiplication over Binary Extension Fields
6. A New Bit-Serial Architecture for Field Multiplication Using Polynomial Bases
7. A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis
8. On Low Complexity Bit Parallel Polynomial Basis Multipliers
9. Error Detection in Polynomial Basis Multipliers over Binary Extension Fields
10. Fast Normal Basis Multiplication Using General Purpose Processors : (Extended Abstract)
11. A Faster Hardware Implementation of the AES S-box
12. Secure Clustering and Symmetric Key Establishment in Heterogeneous Wireless Sensor Networks
13. A Fault Detection Scheme for the FPGA Implementation of SHA-1 and SHA-512 Round Computations
14. Fault Detection Structures of the S-boxes and the Inverse S-boxes for the Advanced Encryption Standard
15. Secure and Efficient Exponentiation Architectures Using Gaussian Normal Basis.
16. Secure and Efficient Exponentiation Architectures Using Gaussian Normal Basis
17. New Low-Area Designs for the AES Forward, Inverse and Combined S-Boxes
18. Fault detection architectures for field multiplication using polynomial bases
19. Efficient algorithms and architectures for field multiplication using Gaussian normal bases
20. Low complexity word-level sequential normal basis multipliers
21. Low complexity bit parallel architectures for polynomial basis multiplication over GF (2 super m)
22. Fast normal basis multiplication using general purpose processors
23. Efficient multiplication beyond optimal normal bases
24. A Modified Low Complexity Digit-Level Gaussian Normal Basis Multiplier
25. A new construction of Massey-Omura parallel multiplier over GFF(2[superscript m])
26. Digit-Serial Structures for the Shifted Polynomial Basis Multiplication over Binary Extension Fields
27. Error Detection in Polynomial Basis Multipliers over Binary Extension Fields
28. Fast Normal Basis Multiplication Using General Purpose Processors
29. New Multiplicative Inverse Architectures Using Gaussian Normal Basis
30. New Area Record for the AES Combined S-Box/Inverse S-Box
31. Smashing the Implementation Records of AES S-box
32. A New Multiplicative Inverse Architecture in Normal Basis Using Novel Concurrent Serial Squaring and Multiplication
33. Stateless leakage resiliency from NLFSRs
34. New Architectures for Digit-Level Single, Hybrid-Double, Hybrid-Triple Field Multiplications and Exponentiation Using Gaussian Normal Bases
35. A CRC-Based Concurrent Fault Detection Architecture for Galois/Counter Mode (GCM)
36. Multiple-Bit Parity-Based Concurrent Fault Detection Architecture for Parallel CRC Computation
37. High-Speed Hybrid-Double Multiplication Architectures Using New Serial-Out Bit-Level Mastrovito Multipliers
38. New Hardware Implementationsof WG$\bf {(29,11)}$and WG- $\bf {16}$StreamCiphers Using Polynomial Basis
39. Parallel and High-Speed Computations of Elliptic Curve Cryptography Using Hybrid-Double Multipliers
40. New Bit-Level Serial GF (2^m) Multiplication Using Polynomial Basis
41. Comments on “Low-Latency Digit-Serial Systolic Double Basis Multiplier over $GF(2^{m})$ Using Subquadratic Toeplitz Matrix-Vector Product Approach”
42. New Regular Radix-8 Scheme for Elliptic Curve Scalar Multiplication without Pre-Computation
43. New Implementations of the WG Stream Cipher
44. A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis
45. A New Bit-Serial Architecture for Field Multiplication Using Polynomial Bases
46. High-Performance Implementation of Point Multiplication on Koblitz Curves
47. Efficient and High-Performance Parallel Hardware Architectures for the AES-GCM
48. Digit-Level Semi-Systolic and Systolic Structures for the Shifted Polynomial Basis Multiplication Over Binary Extension Fields
49. Reliable Hardware Architectures for the Third-Round SHA-3 Finalist Grostl Benchmarked on FPGA Platform
50. Concurrent Error Detection in Montgomery Multiplication over Binary Extension Fields
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