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1. Monte Carlo study of current variability in UTB SOI DG MOSFETs

4. Challenges in Design and Modeling of Cold CMOS HPC Technology

8. Experimental and simulation study of 1D silicon nanowire transistors using heavily doped channels

9. Simulation of hole-mobility in doped relaxed and strained Ge layers.

14. Metamorphosis of a nanowire: a 3-D coupled mode space NEGF study

15. Simulation Study of the Impact of Quantum Confinement on the Electrostatically Driven Performance of n-type Nanowire Transistors

16. Multi-Subband Ensemble Monte Carlo simulation of Si nanowire MOSFETs

31. Predicting Future Technology Performance.

34. Predictive Simulation and Benchmarking of Si and Ge pMOS FinFETs for Future CMOS Technology.

35. Hole Mobility in Germanium as a Function of Substrate and Channel Orientation, Strain, Doping, and Temperature.

36. Hierarchical Simulation of Statistical Variability: From 3-D MC With “ ab initio” Ionized Impurity Scattering to Statistical Compact Models.

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