108 results on '"Ronse, K."'
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2. Status and critical challenges for 157-nm lithography
3. Resist and process implementation issues in future lithography processes for ULSI applications
4. Metrology method for the correlation of line edge roughness for different resists before and after etch
5. 28nm pitch single exposure patterning readiness by metal oxide resist on 0.33NA EUV lithography
6. Metal stack optimization for low-power and high-density for N7-N5
7. Impact of a SADP flow on the design and process for N10/N7 metal layers
8. UV2Litho; Usable Vacuum Ultra Violet Lithography
9. Application of a new approach to Optical Proximity Correction
10. Opportunities and challenges in device scaling by the introduction of EUV lithography
11. High yield sub-0.1µm2 6T-SRAM cells, featuring high-k/metal-gate finfet devices, double gate patterning, a novel fin etch strategy, full-field EUV lithography and optimized junction design & layout
12. Lithography Options for the 32 nm Half Pitch Node and Beyond
13. Full-field EUV and immersion lithography integration in 0.186μm2 FinFET 6T-SRAM cell
14. Full field EUV lithography: lessons learned on EUV ADT imaging, EUV resist and EUV reticles
15. Experimental validation of full-field extreme ultraviolet lithography flare and shadowing corrections
16. Lithography options for the 32nm half pitch node and beyond
17. Imaging performance of the EUV alpha semo tool at IMEC
18. EUV pattern shift compensation strategies
19. Extreme ultraviolet lithography at IMEC: Shadowing compensation and flare mitigation strategy
20. Investigation of mask defectivity in full field EUV lithography
21. Assessment of EUV reticle blank availability enabling the use of EUV tools today and in the future
22. Status of EUV lithography at IMEC
23. Advances in Immersion Related Defectivity on XT:1250i at IMEC
24. Progress in 193nm immersion lithography at IMEC
25. Progress in ArF immersion lithography
26. Pleidooi voor en civilistische aanpak van overeenkomsten gesloten in het kader van overheidsopdrachten
27. Introducing 157 nm Full Field Lithography
28. EUV pattern shift compensation strategies.
29. Imaging performance of the EUV alpha semo tool at IMEC.
30. Full field EUV lithography: lessons learned on EUV ADT imaging, EUV resist and EUV reticles.
31. Experimental investigation of the impact of line-edge roughness on MOSFET performance and yield.
32. Recent Progress in ArF Lithography for the 100nm Node.
33. Lithography for sub-90nm applications.
34. Metal stack optimization for low-power and high-density for N7-N5
35. Optimization of an advanced positive tone DUV photoresist towards 150 nm and beyond
36. Implementation of ArF Resist Processes for 130nm and below.
37. Resist surface investigations for reduction of Line-Edge-Roughness in Top Surface Imaging technology
38. Optimization of an advanced positive DUV resist for 248 nm L/S pattern printing
39. CD control using SiON BARL processing for sub-0.25 μm lithography
40. Recent advancements in 193 nm step and scan lithography.
41. Sub-resolution feature OPC as an enabler for manufacturing at 0.2μm and below
42. Feasibility of 250 nm gate patterning using i-line with OPC
43. Lithographic performance of 193 nm single and bi-layer materials.
44. Optical proximity correction for 0.3 μm i-line lithography
45. Optical proximity correction: Mask pattern-generation challenges
46. Challenges for 0.35-0.25 μm optical lithography
47. Fundamental principles of phase shifting masks by Fourier optics: Theory and experimental verification
48. Positive tone dry development process for 0.25 .MU.m lithography.
49. Attenuated phase shifting masks in combination with off-axis illumination: a way towards quarter micron DUV lithography for random logic applications
50. Edge location errors in Cr-less and rim-type phase-shifting lithography
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