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[SPA] Este trabajo se centra en el diseño, implementación y caracterización de una arquitectura de computación en memoria (CiM) de señal mixta basada en celdas SRAM para el procesamiento de imágenes de baja resolución. La arquitectura propuesta utiliza celdas SRAM y está diseñada para cumplir con requisitos específicos, como la capacidad de aplicar máscaras binarias de 3x3 a imágenes de 256 píxeles y la capacidad de computación en paralelo para el procesamiento por columnas. La arquitectura también permite el cálculo en señal mixta de los productos de convolución necesarios para el procesamiento de las imágenes. Se propone un diseño ASIC que procesaría imágenes provenientes de un sensor CMOS en modo corriente con una resolución de 16x16 píxeles. Además, se plantea el diseño y caracterización de una arquitectura de test funcional y operativa para evaluar las prestaciones de procesamiento de la arquitectura CiM en capas de redes neuronales convolucionales aplicadas a la interpretación de imágenes de baja resolución. Se diseñan y caracterizan diferentes circuitos básicos, como celdas SRAM, comparadores analógicos, circuitos de conversión digital-analógica y circuitos digitales para el control de la arquitectura. [ENG] This work focuses on the design, implementation, and characterization of a mixed-signal compute-in-memory (CiM) architecture based on SRAM cells for lowresolution image processing. The proposed architecture utilizes SRAM cells and is designed to meet specific requirements, such as the ability to apply 3x3 binary masks to 256-pixel images and parallel computing capability for column-wise image processing. The architecture also enables mixed-signal computation of the convolutional products required for image processing. An ASIC design is proposed to process images from current-mode CMOS sensor with a resolution of 16x16 pixels. Furthermore, the design and characterization of a functional and operational test architecture are proposed to evaluate the process

The power dissipation of a pipeline analog to digital converter (ADC) depends on different design strategies. In this brief communication, an 11-bit pipeline ADC consisting of five stages with 2.5 effective bit resolution is described. The circuit combines two main techniques to improve power dissipation, such as sharing OTAs between adjacent ADC stages and dynamic regulation of the OTA biasing according to the stage and subcycle of operation. To reduce the charge injection effect caused by the OTA sharing added circuitry, the ADC uses a topology based on four-input OTAs to reduce the number of transmission gates. The ADC has been fabricated using a standard 0.35 µm CMOS process. It consumes 17.85 mW at 10 MSample/s sampling rate. With this resolution and sampling rate, the measurement results show that it achieves 58.20 dB SNDR and 9.38 bit ENOB at 1 MHz input frequency.

This document provides a comparative evaluation of the performance of a deep learning network for different combinations of parameters and hyper-parameters. Although there are numerous studies that report on performance in deep learning networks for ordinary data sets, their performance on small data sets is much less evaluated. The objective of this work is to demonstrate that such a challenging small data set, such as a welding X-ray image data set, can be trained and evaluated obtaining high precision and that it is possible thanks to data augmentation. In fact, this article shows that data augmentation, also a typical technique in any learning process on a large data set, plus that two image channels, such as channels B (blue) and G (green), both are replaced by the Canny edge map and a binary image provided by an adaptive Gaussian threshold, respectively, gives to the network a 3% increase in accuracy, approximately. In summary, the objective of this work is to present the methodology used and the results obtained to estimate the classification accuracy of three main classes of welding defects obtained on a small set of welding X-ray image data.

This work presents a new analog architecture to perform image convolution for deep learning purposes in CMOS imagers in the analog domain. The architecture is focused to reduce both power dissipation and data transfer between memory and the analog operators. It uses mixed signal multiply and add operators arranged following a row-parallel architecture in order to be fully scalable for different CMOS imager sizes. The multiplier circuit used is based on a current mode architecture to multiply the value of analog inputs by the digital stored weights and produce current mode outputs which are then added to obtain the convolution result. A digital control circuit manages the pixel readout and the multiply and add operations. The architecture is demonstrated performing 3x3 convolutions on 64x64 images with a padding equal to 1. Convolution weights are locally stored as 4-bit digital values. The circuit has been synthesized in 110 nm CMOS technology. For this configuration, the simulation results show that the circuit is able to perform a whole convolution in 32 us and achieve an efficiency of 2.13 TOPS/W. These results can be extrapolated to larger CMOS imagers and different mask sizes.

This paper presents a 9-bit, 2-stage cyclic analog to digital converter (ADC) with a variable bias current control circuitry to reduce its power dissipation. Each stage outputs a three-bit digital word and the circuit requires four subcycles to perform a whole conversion. Since the accuracy required is higher in the first stage and first subcycle and decreases in subsequent cycles, the bias current of each operational transconductance amplifier is regulated depending on the subcycle of the conversion process. The resolution and sampling frequency of the converter make it suitable to be integrated with 8-bit CMOS imagers with column-parallel ADC architectures. The ADC has been designed using a 1.2 V 110 nm CMOS technology and the circuit consumes 27.9 µW at a sampling rate of 500 kS/s. At this sampling rate and at a 32 kHz input frequency, the circuit achieves 56 dB of SNDR and 9 bit ENOB. The Figure of Merit is 109 fJ/step.

En el presente proyecto se ha desarrollado un guante capaz de aumentar la inmersión de un usuario en entornos virtuales, utilizando la tecnología háptica para estimular el sentido del tacto. Esto se consigue gracias a la actuación de una serie de motores de vibración colocados en la punta de los dedos para simular el tacto que tendrán los objetos tocados en la escena virtual, tanto en forma como presión. Se han implementado el diseño y las pruebas requeridas para el desarrollo del prototipo del guante háptico, así como la justificación de los componentes utilizados para el diseño de un prototipo de bajo coste que cumpla con las especificaciones requeridas y que a su vez asegure que el prototipo sea lo más ergonómico e intuitivo posible para el usuario. Además, se ha añadido un esquema de la disposición de los elementos en el diseño del guante háptico, detallando la posición exacta de los sensores Flex, utilizados para la medida de la flexión ejercida por los dedos, y de los motores vibradores, que serán los actuadores en el guante para lograr el estímulo requerido. Para la puesta en práctica de este prototipo se ha hecho uso del motor de videojuegos multiplataforma Unity para crear una escena con diferentes objetos que poder tocar y sentir. La escena se encuentra diseñada para una visualización por pantalla, pero es completamente exportable a una escena en realidad virtual inmersiva, pudiendo lograr mejores resultados si se integra la solución de la tecnología háptica con otros dispositivos de realidad virtual. Para el posicionamiento de las manos en el entorno virtual, hemos hecho uso del dispositivo Leap Motion de captura de movimiento por medio de procesamiento de imagen, capaz de replicar la posición de las manos humanas a partir de las imágenes captadas por el dispositivo. Este dispositivo aporta datos de mayor calidad y fiabilidad que el resto de dispositivos similares al mismo. Sin embargo, para garantizar el correcto funcionamiento del prototipo, se han inte

El objetivo principal de este Trabajo es el diseño, implementación y verificación de un sistema electrónico que permita acondicionar señales fonocardiográficas mediante circuitería analógica inmediatamente después de su adquisición con un estetoscopio electrónico. Para ello, se realizará un estudio de las características de las señales fonocardiográficas, se revisarán propuestas previas de sistemas con un propósito parecido y se propondrá una solución que satisfaga los requisitos definidos. Una vez propuesta la estructura del sistema, éste se implementará sobre una plataforma basada en circuitos tipo FPAA mediante las herramientas software de desarrollo que deben permitir, en primer lugar, verificar mediante simulación su correcto funcionamiento. El siguiente paso es implantar el sistema diseñado en un sistema de desarrollo para estos dispositivos enlazado con un ordenador personal para proceder a su verificación experimental. Por último, se diseñará y fabricará un prototipo plenamente funcional y autónomo con FPAA y los circuitos periféricos de programación e interfaz en una placa de circuito impreso. De esta manera, los objetivos específicos de este trabajo se pueden resumir en los siguientes puntos: · Diseño del subsistema de acondicionamiento analógico para señales FCG, incluyendo los filtros necesarios para seleccionar las bandas de interés de sonidos y soplos cardiacos y el mecanismo de ajuste de ganancia para ajustar la amplitud de la señal de salida a un nivel de voltaje concreto. · Simulación, síntesis y validación del subsistema de acondicionamiento analógico diseñado mediante el entorno AnadigmDesigner 2, en conexión con el kit de desarrollo AN221K04E, proporcionado por la firma Anadigm para la FPAA modelo AN221E04. · Diseño y realización de un prototipo físico sobre placa de circuito impreso (PCB - Printed Circuit Board) para implementar el subsistema con un mínimo número de componentes y, por tanto, con un mínimo consumo. Este prototipo habrá de ser con

One of the main problems to resolve in the processing of biomedical images is the reduction of noise. The problem is specially important if the noise has a multiplicative nature (speckle noise), for instance if the object of analysis is an ultrasonic image. In this report we carry out a review of techniques which can be used to reduce this type of noise on four-chamber view B-mode echocardiographic images in an appropriated way. Different ways of nonlinear filtering, adaptive techniques based on the statistical ordering and a cubic spline interpolation will be shown as suitable techniques for this objective but regarding quantitative and qualitative results we have obtained, we can confirm that a cubic spline filter is the most suitable filter that we have reviewed.

An FPGA-based approach is proposed for implementing a compression system developed specifically for the signal of phonocardiogram. The compression method offers better rate and distorsion than standard audio compression techniques. Both the algorithm and the details on the solutions adopted for its implementation are presented in this paper., This work has been supported by Ministerio de Ciencia y Tecnología of Spain, under grant TIN2006-15460-C04-04.

A general purpose system for telediagnosis of the valvular condition of the heart by analysing the phonocardiographic (PCG) signals generated by the heart is presented in this article. The system includes two main parts: a processing stage and a compression stage. The first one is arranged as a modular hierarchical structure with different abstraction levels, and performs a complete analysis of the PCG from the acquisition to the final diagnosis, following an event-based methodology. Analysis does not use auxiliary signals like ECG or pulse. The compression stage includes a lossy compression wavelet-based method with optimized parameters for an efficient transmission and storing of PCG signals. Results show a high degree of cardiac cycles in which all the events have been correctly delimited and identified, 91.27% and 65.65% for non-murmurs and for murmurs recordings, respectively, and compression rates between 2.6 and 5.6 times higher than the OGG Vorbis compression method.

Nowadays, the microelectronics market is characterized by an increasing complexity and integration, in particular in the field of application specific integrated circuits (ASICs) not only for digital but also for mixed-signal designs. The lack of a well defined methodology for analog synthesis, similar to the digital field means a serious drawback for analog and mixed signal design development. In this sense, the arise of VHDL-AMS is a recent evolution which promises to link analog design automation tasks into a coherent framework, in a similar fashion that digital design. In this paper, a tool to perform automated synthesis of analog systems, described in VHDL-AMS, into analog programmable devices is presented. The tool is focused to synthesise filters, wave-shaping circuits, amplifiers and in general most circuits supported by programmable technology. It is demonstrated with a practical example of a analog system composed by two filters and two controllable gain stages., This work has been supported by Ministerio de Ciencia y Tecnología of Spain, under grant TIC2003-09400-C04-02.

[SPA] El proceso de resolución de problemas que supone la acción de proyectar está dividido en dos partes esenciales: El problema creativo que plantea la necesidad de buscar soluciones y el problema de evaluación y toma de decisión que plantea la necesidad de escoger de entre todas las soluciones generadas, la óptima o la que mejor satisfaga los objetivos. En muchas situaciones, los seres humanos han de tomar decisiones. Las personas que tienen que asumir la responsabilidad de tomar decisiones difíciles cuyas consecuencias influirán en el proyecto o en la organización a la que pertenecen o dirigen, están sometidas a tensiones profesionales y emocionales. Estas decisiones difíciles se caracterizan por observar intereses contrapuestos, tener elementos de incertidumbre, envolver distintas personas en la decisión o bien poseer elementos difícilmente valorables. Desde que en 1965 Lofti Zadeh introdujera el concepto de lo “fuzzy” permitiendo la pertenencia de un elemento a un conjunto de forma gradual, y no de manera absoluta como establece la teoría conjuntista clásica, es decir, admitiendo pertenencias valoradas en el intervalo [0,1] en lugar de en el conjunto . Las aplicaciones y desarrollos basados en este sencillo concepto han evolucionado de tal modo que, hoy en día, es prácticamente imposible calcular el volumen de negocio que generan en todo el mundo. En este contexto, el objetivo general de la presente investigación es ahondar en el estudio de la evaluación de alternativas en el ámbito de la “Soft Computing” y dado que los métodos clásicos resultan ineficientes para problemas de decisión complejos, sobre todo para aquellos casos en los que nos encontremos con criterios de los que solo disponemos de información cualitativa. En este trabajo se presenta un sistema hibrido que recoge las fortalezas de cada una de las métodos clásicos utilizados. Con este propósito se pretende aportar una herramienta de ámbito general mediante un sistema de ayuda a la decisión (SAD) p, [ENG] The process of solving problems that making a project supposes is divided into two essential parts: the creative problem which poses the need to find solutions, and the problem of evaluation and decision making which implies the need to choose from all the solutions generated, the optimum option, or that which best satisfies the objectives. In many situations, human beings must make decisions. Those people who must accept the responsibility of taking difficult decisions with consequences that will influence the project or the organization they belong to or manage, are subjected to professional and emotional stresses. These difficult decisions are characterised by observing opposing interests having elements of uncertainty, involving different people in the decision or possessing elements which are difficult to value. Since 1965 when Lofti Zadeh introduced the “fuzzy” concept which permitted an element to belong to a set in a gradual way, and not in an absolute way as classical set theory established, that is to say, admitting belonging valued in the interval [0,1] instead of in the set , the applications and developments based on this simple concept have evolved to such an extent that nowadays, it is practically impossible to calculate the volume of business it generates throughout the world. In this context, the general objective of the present investigation is to go deeper into the study of the evaluation of alternatives in the field of “Soft Computing”, given that the classical methods are inefficient for complex decision problems, above all for those cases in which we find ourselves with criteria about which we only have qualitative information. In this work a hybrid system is presented which gathers together the strengths of each of the classical methods used. With this purpose the intention is to provide a general tool by means of a decision support system (DSS) for the evaluation of alternatives in such a way that it helps to modelize different types of

High performance analog-to-digital converters (ADC) are essential elements for the development of high performance image sensors. These circuits need a big number of ADCs to reach the required resolution at a specified speed. Moreover, nowadays power dissipation has become a key performance to be considered in analog designs, specially in those developed for portable devices. Design of such circuits is a challenging task which requires a combination of the most advanced digital circuit, the analog expertise knowledge and an iterative design. Amplifier sharing has been a commonly used technique to reduce power dissipation in pipelined ADCs. In this paper we present a partial amplifier sharing topology of a 12 bit pipeline ADC, developed in 0.35 mum CMOS process. Its performance is compared with a conventional amplifier scaling topology and with a fully amplifier sharing one.

Radiographic inspection is a well-established testing method to detect weld defects. However, interpretation of radiographic films is a difficult task. The reliability of such interpretation and the expense of training suitable experts have allowed that the efforts being made towards automation in this field. In this paper, we describe an automatic detection system to recognise welding defects in radiographic images. In a first stage, image processing techniques, including noise reduction, contrast enhancement, thresholding and labelling were implemented to help in the recognition of weld regions and the detection of weld defects. In a second stage, a set of geometrical features was proposed and extracted between defect candidates. In a third stage, an artificial neural network for weld defect classification was used under three regularisation process with different architectures. For the input layer, the principal component analysis technique was used in order to reduce the number of feature variables; and, for the hidden layer, a different number of neurons was used in the aim to give better performance for defect classification in both cases.

An FPGA-based approach is proposed for implementing a compression system developed specifically for the signal of phonocardiogram. The compression method offers better rate and distorsion than standard audio compression techniques. Both the algorithm and the details on the solutions adopted for its implementation are presented in this paper.

En esta presentación nos hablan del Proyecto MEDICI , cuyos objetivos son: 1. Utilidades de adquisición, almacenamiento y anotación de fonocardiogramas (base de datos), 2. Procesamiento digital, segmentación e interpretación de señales FCG. 3.Compresión eficiente de FCG , 4.Prototipo de “estetoscopio inteligente. Asi como del Proyecto IDEATIO, que tiene los siguientes objetivos: Especificación, modelización, diseño y verificación de un sistema electrónico para adquisición, tratamiento y transmisión de señales de poligrafía cardio-respiratoria (PGCR) →correlación cardiopatías vs. SAHS.

A general purpose system for telediagnosis of the valvular condition of the heart by analysing the phonocardiographic (PCG) signals generated by the heart is presented in this article. The system includes two main parts: a processing stage and a compression stage. The first one is arranged as a modular hierarchical structure with different abstraction levels, and performs a complete analysis of the PCG from the acquisition to the final diagnosis, following an event-based methodology. Analysis does not use auxiliary signals like ECG or pulse. The compression stage includes a lossy compression wavelet-based method with optimized parameters for an efficient transmission and storing of PCG signals. Results show a high degree of cardiac cycles in which all the events have been correctly delimited and identified, 91.27% and 65.65% for non-murmurs and for murmurs recordings, respectively, and compression rates between 2.6 and 5.6 times higher than the OGG Vorbis compression method.

Nowadays, the microelectronics market is characterized by an increasing complexity and integration, in particular in the field of application specific integrated circuits (ASICs) not only for digital but also for mixed-signal designs. The lack of a well defined methodology for analog synthesis, similar to the digital field means a serious drawback for analog and mixed signal design development. In this sense, the arise of VHDL-AMS is a recent evolution which promises to link analog design automation tasks into a coherent framework, in a similar fashion that digital design. In this paper, a tool to perform automated synthesis of analog systems, described in VHDL-AMS, into analog programmable devices is presented. The tool is focused to synthesise filters, wave-shaping circuits, amplifiers and in general most circuits supported by programmable technology. It is demonstrated with a practical example of a analog system composed by two filters and two controllable gain stages.

La señal fonocardiográfica refeleja los eventos causados en el corazón por la dinámica de las válvulas y del flujo sanguíneo. Esta señal se puede comprimir de forma directa, sin tener en cuenta estos eventos, mediante un método de compremsión de datos o señales, específico o no, obteniendo una determinada tasa de comprensión del fonocardiograma, basado en eventos. En pimer lugar, se detectan los eventos básicos del ciclo cardíaco. Posteriormente se comprimen éstos con una determinada calidad, y el resto de la señal (donde no existen eventos cardíacos, y, por tanto, información relevante) se comprime con una calidad menor. De esta forma se obtiene una tasa de compresión mayor, sin perder calidad respecto a la compresión directa en los tramos de señal donde existen eventos cardíacos.

In this paper, a tool based on free software to perform low level optimization on analog designs is presented. Nowadays, the use of design automation tools for microelectronic circuits design is extending from digital to analog circuits, due in part to the fact although the analog part of a mixed signal ASIC takes only the 10% of the silicona area, it represents almost 90% of the whole design time. For analog circuits, design process can be divided in two major tasks: topology selection an device sizing. The tool here presented consists on a simulation based optimizer, which is used to perform automatic low level analog circuit sizing. The tool is composed of three modules: a layout generator, which includes a parasitic extractor, an analog circuit simulator and circuit optimizer. The two first modules are respectively Mgic and Spice from Berkeley, while the third one, the optimizer, has been developed to evaluate dc, ac, and transient sensitivity simulations performed by Spice and make corrections on the layout sizing. Optimization process atars with a certain topology and atandard sized devices, which is then extracted by Magic and simulated by Spice. Performance is evaluated and a sizing correction is proposed. These simulations and corrections are done on an iteractive loop until circuit performance reaches design parameters. The tool is demonstrated with an example of a simple analog subcircuit optimization, where parameters like silicon area or power dissipation are optimized, while the circuit keeps on design parameters

The auscultation of the heart is still the first basic analysis tool used to evaluate the functional state of the heart, as well as the first indicator used to submit the patient to a cardiologist. In order to improve the diagnosis capabilities of auscultation, signal processing algorithms are currently being developed to assist the physician at primary care centers for adult and pediatric population. A basic task for the diagnosis from the phonocardiogram is to detect the events (main and additional sounds, murmurs and clicks) present in the cardiac cycle. This is usually made by applying a threshold and detecting the events that are bigger than the threshold. However, this method usually does not allow the detection of the main sounds when additional sounds and murmurs exist, or it may join several events into a unique one. In this paper we present a reliable method to detect the events present in the phonocardiogram, even in the presence of heart murmurs or additional sounds. The method detects relative maxima peaks in the amplitude envelope of the phonocardiogram, and computes a set of parameters associated with each event. Finally, a set of characteristics is extracted from each event to aid in the identification of the events. Besides, the morphology of the murmurs is also detected, which aids in the differentiation of different diseases that can occur in the same temporal localization. The algorithms have been applied to real normal heart sounds and murmurs, achieving satisfactory results.

In first place, in this paper, the basic process of parallel code implementation is discussed for a VLIW architecture. Parallel code modules allow the implementation of a contour active (snake) for segmentation and tracking of endocardium in echocardiographic images. In second place, this work discusses the performance obtained through this design model. In this case, it is necessary to check performances in order to obtain a qualitative and quantitative measurement of our implementation. We have chosen one example which permits to understand the methodology used in order to obtain the maximum performance of hardware features of VLIW processor: the distance between points of active contour, very used in different modules composing the active contour algorithm.

La compresión del fonocardiograma depende de varios parámetros, cada uno de los cuáles puede tomar un conjunto de valores. La determinación del comjunto óptimo de estos valores mediante la exploración sistemática de todo el espacio de búsqueda que definen resulta computacionalmente muy costosa. En este trabajo se han utilizado algoritmos genéticos para determinar el conjunto óptimo de estos valores, obteniendolo en un tiempo considerablemente inferior. Además, el algoritmo de compresión se ha implementado en un dispositivo PDA, que registra la señal fonocardiográfica por la entrada de audio, la visualiza, la comprime, y la transmite finalmente a través de redes inalámbricas a un servidor. Los resultados obtenidos han permitido comprobar que los modernos dispositivos PDA disponen ya de recursos suficientes (velocidad, exigencias de comunicación, ....) para la compresión y transmisión del FCG.

The bonding structure and hydrogen content of amorphous hydrogenated silicon nitride (a-SiNx:H) thin films have been investigated by infrared spectroscopy and ion beam techniques. Electron cyclotron resonance plasma enhanced chemical vapor deposition was used to produce these films under different values of gas flow ratio, deposition temperature, and microwave power. The amount of bonded hydrogen was calculated from the N-H and Si-H infrared absorption bands. An increase of the SiH4 partial pressure during deposition was found to have the same effect on the H content as an increase of the substrate temperature: both cause a decrease of the N-H bond density and an increase in the number of Si-H bonds. This is explained by a competitive process in the formation of N-H and Si-H bonds during the growth of the film, whereby Si-H bonds are favored at the expense of N-H bonds when either the SiH4 flow or the substrate temperature are increased. Such tendency to chemical order is compared with previous results in which the same behavior was induced by thermal annealing or ion beam bombardment.

The instantaneous frequency can be used to provide information about how the frequency content of the phonocardiogram signal varies in time, in order to characterize the heart sounds and murmurs. The instantaneous frequency of a signal can be calculated from the discrete Hilbert transform, computed through the moving discrete Hartley transform, which reduces the computation time. To compute in real time the instantaneous frequency, the algorithms have been implemented in a FPGA device, exploiting the high performance and flexibility of reconfigurable hardware. The results obtained from the FPGA show high accuracy in comparison to those computed with Matlab

En este artículo se presenta una estructura jerárquica basada en la abstracción de señales para el análisis e interpretación de la señal fonocardiográfica con el objetivo de servir de ayuda al diagnóstico de patologías valvulares. La estructura consta de diferentes niveles, que a su vez están compuestos de varios bloques de procesamiento que realizan tareas muy definidas. Entre las técnicas propuestas se encuentran el cálculo de la frecuencia instantánea para proporcionar información en el plano tiempo-frecuencia, o el de la autocorrelación de envolventes como método robusto para detectar el ritmo cardiaco medio a partir únicamente de la señal fonocardiográfica. Además, el método empleado para detectar y separar eventos resulta muy efectivo incluso en el caso de sonidos unidos a soplos.

En este artículo se describe un método específico para la compresión del fonocardiograma. Este método emplea la transformada wavelet, descartando aquellos coeficientes inferiores a un determinado umbral (compresión con pérdidas) junto a otros métodos adicionales para aumentar la tasa de compresión, como la codificación Huffman y la codificación RLE (compresión sin pérdidas). Los resultados muestran mejor tasa de compresión y menor distorsión que las obtenidas mediante las técnicas estándar de compresión de audio, debido a que el método propuesto está específicamente diseñado para la banda de frecuencias de interés de las señales fonocardiográficas.

[ESP] En este artículo se presenta un nuevo controlador fuzzy jerárquico de dos etapas para sistemas ABS. En una primera etapa el controlador estima el deslizamiento que ha de tener la rueda del vehículo para conseguir la mejor frenada posible en función del tipo de firme y en una segunda calcula cual debe ser el par de frenado más adecuado para cada instante. [ENG]In this article a new two-stages hierarchical fuzzy controller for Anti-lock Braking Systems is presented. In the first stage, the controller estimates the optimum slip ratio between tire and driving surface to obtain the highest friction based on the type of pavement. In the second stage it calculates the braking torque to apply at every instant.

Las desventajas de las soluciones hardware dedicadas para la implementación de sistemas de inferencia fuzzy cuando se comparan con las estrategias basadas en software son principalmente la falta de flexibilidad y la complicación en el proceso de diseño. En este trabajo se presenta una arquitectura novedosa que permite la síntesis electrónica y la implementación hardware de sistemas expertos basados en conocimiento fuzzy. La definición de la arquitectura se basa en la descripción en forma de red de Petri de la base de reglas complejas, heredando de ella las características de modularidad y escalabilidad. Los componentes de nuestra arquitectura se definen entonces utilizando descripciones VHDL de alto nivel. Por ello, nuestra metodología de diseño proporciona flexibilidad, reusabilidad e independencia tanto de la tecnología electrónica como del tipo y tamaño de la aplicación, solucionando la mayoría de las limitaciones del hardware fuzzy.