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The interaction with Advanced Driver Assistance Systems has several positive implications for road safety, but also some potential downsides such as mental workload and automation complacency. Malleable attentional resources allocation theory describes two possible processes that can generate workload in interaction with advanced assisting devices. The purpose of the present study is to determine if specific analysis of the different modalities of autonomic control of nervous system can be used to discriminate different potential workload processes generated during assisted-driving tasks and automation complacency situations. Thirty-five drivers were tested in a virtual scenario while using head-up advanced warning assistance system. Repeated MANOVA were used to examine changes in autonomic activity across a combination of different user interactions generated by the advanced assistance system: (1) expected take-over request without anticipatory warning; (2) expected take-over request with two-second anticipatory warning; (3) unexpected take-over request with misleading warning; (4) unexpected take-over request without warning. Results shows that analysis of autonomic modulations can discriminate two different resources allocation processes, related to different behavioral performances. The user's interaction that required divided attention under expected situations produced performance enhancement and reciprocally-coupled parasympathetic inhibition with sympathetic activity. At the same time, supervising interactions that generated automation complacency were described specifically by uncoupled sympathetic activation. Safety implications for automated assistance systems developments are considered. [ABSTRACT FROM AUTHOR]

Accurate measurements of solids flow rate in pneumatic conveying systems have been a need for the different industries in which these systems are used. In this study, a system identification approach, which is called the Deterministic Stochastic Realization (DSR) method, is used to obtain a state-space model. The selection of inputs to the system identification model is based on conservation of energy related to the Bernoulli principle. Under this investigation, attempts were made to predict the mass flow rate of conveying solids in real time by using pressure data obtained from three different pressure sensors located on the conveying line, blow tank pressure, and total air volume flow rate. Tests were performed in two different pneumatic conveying rigs and with two different materials. The conveyed materials were baryte and dextrose. Dextrose and baryte were conveyed in dilute and dense phases, respectively. To evaluate the DSR model, the results were compared with one published method based on a scaling up technique of pneumatic conveying. The root mean squared error of prediction (RMSEP) of the cumulative mass of transported solids as a percentage of the total conveyed mass using the system identification model was between 1.4 and 5.6% for baryte and 3.2 and 7.8% for dextrose. The cumulative error was between 0.7 and 7.2% for baryte and 3.7 and 8.6% for dextrose. [ABSTRACT FROM AUTHOR]

Switched capacitor sample and hold (SHA) stages in deep submicron technologies can achieve hundreds of mega samples per second of sampling frequency, but are affected by several nonlinear effects which reduce their signal‐to‐noise‐and‐distortion ratio (SNDR): CMOS switch non‐idealities, amplifier nonlinearity, and incomplete settling. It is possible to model and correct distortions using Volterra kernels, which can be rather resource‐consuming as the number of parameters to estimate rapid increases with the order and length of the kernels. In this reported work, it is shown that a switched capacitor SHA, simulated using the 45 nm process by STMicroelectronics, can be calibrated to achieve a 10–24 dB improvement in SNDR. Computational costs are kept low using a different lag value for each kernel, and iteratively pruning the elements of the Volterra kernels which affect linearity the least. A technique for estimation and out‐of‐sample validation is presented and robustness checks are performed. A performance gain of 8.5 dB can be achieved with as few as 17 correction parameters, while 21 coefficients are enough to gain 12.2 dB, and 36 to gain 18.4 dB. [ABSTRACT FROM AUTHOR]

A Volterra model is used to calibrate a pipeline ADC simulated in Cadence Virtuoso using the STMicroelectronics CMOS 45 nm process. The ADC was designed to work at 50 MSps, but it is simulated at up to 125 MSps, proving that calibration using a Volterra model can significantly increase sampling frequency. Equivalent number of bits (ENOB) improves by 1-2.5 bits (6-15 dB) with 37-101 model parameters. The complexity of the calibration algorithm is reduced using different lengths for each Volterra kernels and performing iterative pruning. System identification is performed by least squares techniques with a set of sinusoids at different frequencies spanning the whole Nyquist band. A comparison with simplified Volterra models proposed in the literature shows better performance for the pruned Volterra model with comparable complexity, improving linearity by as much as 1.5 bits more than the other techniques. [ABSTRACT FROM AUTHOR]

A Volterra model is used to calibrate a pipeline ADC simulated in Cadence Virtuoso using the STMicroelectronics CMOS 45 nm process. The ADC was designed to work at 50 MSps, but it is simulated at up to 125 MSps, proving that calibration using a Volterra model can significantly increase sampling frequency. Equivalent number of bits (ENOB) improves by 1–2.5 bits (6–15 dB) with 37–101 model parameters. The complexity of the calibration algorithm is reduced using different lengths for each Volterra kernels and performing iterative pruning. System identification is performed by least squares techniques with a set of sinusoids at different frequencies spanning the whole Nyquist band. A comparison with simplified Volterra models proposed in the literature shows better performance for the pruned Volterra model with comparable complexity, improving linearity by as much as 1.5 bits more than the other techniques. [ABSTRACT FROM AUTHOR]

Switched capacitor sample and hold (SHA) stages in deep submicron technologies can achieve hundreds of mega samples per second of sampling frequency, but are affected by several nonlinear effects which reduce their signal-to-noise-and-distortion ratio (SNDR): CMOS switch non-idealities, amplifier nonlinearity, and incomplete settling. It is possible to model and correct distortions using Volterra kernels, which can be rather resource-consuming as the number of parameters to estimate rapid increases with the order and length of the kernels. In this reported work, it is shown that a switched capacitor SHA, simulated using the 45 nm process by STMicroelectronics, can be calibrated to achieve a 10-24 dB improvement in SNDR. Computational costs are kept low using a different lag value for each kernel, and iteratively pruning the elements of the Volterra kernels which affect linearity the least. A technique for estimation and outof- sample validation is presented and robustness checks are performed. A performance gain of 8.5 dB can be achieved with as few as 17 correction parameters, while 21 coefficients are enough to gain 12.2 dB, and 36 to gain 18.4 dB. [ABSTRACT FROM AUTHOR]