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This paper reviews the state of the art in spin-torque and spin Hall effect driven nano-oscillators. After a brief introduction to the underlying physics, the authors discuss different implementations of these oscillators, their functional properties in terms of frequency range, output power, phase noise, and modulation rates, and their inherent propensity for mutual synchronization. Finally, the potential for these oscillators in a wide range of applications, from microwave signal sources and detectors to neuromorphic computation elements, is discussed together with the specific electronic circuitry that has so far been designed to harness this potential.

The measurement of the biological tissue's electrical impedance is an active research field that has attracted a lot of attention during the last decades. Bio-impedances are closely related to a large variety of physiological conditions; therefore, they are useful for diagnosis and monitoring in many medical applications. Measuring living tissues, however, is a challenging task that poses countless technical and practical problems, in particular if the tissues need to be measured under the skin. This paper presents a bio-impedance sensor ASIC targeting a battery-free, miniature size, implantable device, which performs accurate 4-point complex impedance extraction in the frequency range from 2 kHz to 2 MHz. The ASIC is fabricated in 150 nm CMOS, has a size of 1.22 mm x 1.22 mm and consumes 165 uA from a 1.8 V power supply. The ASIC is embedded in a prototype which communicates with, and is powered by an external reader device through inductive coupling. The prototype is validated by measuring the impedances of different combinations of discrete components, measuring the electrochemical impedance of physiological solution, and performing ex vivo measurements on animal organs. The proposed ASIC is able to extract complex impedances with around 1 Ohm resolution; therefore enabling accurate wireless tissue measurements.

The rapid development of the magnetic tunnel junction (MTJ) spin torque oscillator (STO) technology demands an analytical model to enable building MTJ STO-based circuits and systems so as to evaluate and utilize MTJ STOs in various applications. In Part I of this paper, an analytical model based on the macrospin approximation, has been introduced and verified by comparing it with the measurements of three different MTJ STOs. In Part II, the full Verilog-A implementation of the proposed model is presented. To achieve a reliable model, an approach to reproduce the phase noise generated by the MTJ STO has been proposed and successfully employed. The implemented model yields a time domain signal, which retains the characteristics of operating frequency, linewidth, oscillation amplitude and DC operating point, with respect to the magnetic field and applied DC current. The Verilog-A implementation is verified against the analytical model, providing equivalent device characteristics for the full range of biasing conditions. Furthermore, a system that includes an MTJ STO and CMOS RF circuits is simulated to validate the proposed model for system- and circuit-level designs. The simulation results demonstrate that the proposed model opens the possibility to explore STO technology in a wide range of applications., Comment: 7 pages, 7 figures

Magnetic tunnel junction (MTJ) spin torque oscillators (STO) have shown the potential to be used in a wide range of microwave and sensing applications. To evaluate potential uses of MTJ STO technology in various applications, an analytical model that can capture MTJ STO's characteristics, while enabling system- and circuit-level designs, is of great importance. An analytical model based on macrospin approximation is necessary for these designs since it allows implementation in hardware description languages. This paper presents a new macrospin-based, comprehensive and compact MTJ STO model, which can be used for various MTJ STOs to estimate the performance of MTJ STOs together with their application-specific integrated circuits. To adequately present the complete model, this paper is divided into two parts. In Part I, the analytical model is introduced and verified by comparing it against measured data of three different MTJ STOs, varying the angle and magnitude of the magnetic field, as well as the DC biasing current. The proposed analytical model is suitable for being implemented in Verilog-A and used for efficient simulations at device-, circuit- and system-levels. In Part II, the full Verilog-A implementation of the analytical model with accurate phase noise generation is presented and verified by simulations., Comment: 8 pages, 4 figures

The static linearity performance metrics of the GFET transconductor are studied and modeled. Closed expressions are proposed for second and third order harmonic distortion (HD2, HD3), second and third order intermodulation distortion ({\Delta}IM2), {\Delta}IM3), and second and third order intercept points (AIIP2, AIIP3). The expressions are validated through large-signal simulations using a GFET VerilogA analytical model and a commercial circuit simulator. The proposed expressions can be used during circuit design in order to predict the GFET biasing conditions at which linearity requirements are met.

During the last years, Graphene based Field Effect Transistors (GFET) have shown outstanding RF performance; therefore, they have attracted considerable attention from the electronic devices and circuits communities. At the same time, analytical models that predict the electrical characteristics of GFETs have evolved rapidly. These models, however, have a complexity level that can only be handled with the help of a circuit simulator. On the other hand, analog circuit designers require simple models that enable them to carry out fast hand calculations, i.e., to create circuits using small-signal hybrid-{\pi} models, calculate figures of merit, estimate gains, pole-zero positions, etc. This paper presents a comprehensive GFET model that is simple enough for being used in hand-calculations during circuit design and at the same time it is accurate enough to capture the electrical characteristics of the devices in the operating regions of interest. Closed analytical expressions are provided for the drain current ID, small-signal transconductance gain gm, output resistance ro, and parasitic Vgs and Cgd. In addition, figures of merit such as intrinsic voltage gain AV, transconductance efficiency gm/ID, and transit frequency fT are presented. The proposed model has been compared to a complete analytical model and also to measured data available in current literature. The results show that the proposed model follows closely to both the complete analytical model and the measured data; therefore, it can be successfully applied in the design of GFET analog circuits., Comment: 9 pages,11 figures

A graphene field-effect-transistor (GFET) model calibrated with extracted device parameters and a commercial 65 nm silicon MOSFET model are compared with respect to their radio frequency behavior. GFETs slightly lag behind CMOS in terms of speed despite their higher mobility. This is counterintuitive, but can be explained by the effect of a strongly nonlinear voltage-dependent gate capacitance. GFETs achieve their maximum performance only for narrow ranges of VDS and IDS, which must be carefully considered for circuit design. For our parameter set, GFETs require at least {\mu} = 3000 cm2 V-1 s-1 to achieve the same performance as 65 nm silicon MOSFETs., Comment: 12 pages, 3 figures