143 results on '"Rzepa, G."'
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2. Identification of oxide defects in semiconductor devices: A systematic approach linking DFT to rate equations and experimental evidence
3. Comphy — A compact-physics framework for unified modeling of BTI
4. A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability
5. The defect-centric perspective of device and circuit reliability—From gate oxide defects to circuits
6. The anti-inflammatory and antifibrotic effects of a novel, pan-phosphodiesterase inhibitor in murine model of allergic asthma
7. Understanding the ISPP Slope in Charge Trap Flash Memory and its Impact on 3-D NAND Scaling
8. Highly-stable black phosphorus field-effect transistors with low density of oxide traps
9. Variability-Aware DTCO Flow: Projections to N3 FinFET and Nanosheet 6T SRAM
10. A TCAD Compatible SONOS Trapping Layer Model for Accurate Programming Dynamics
11. Modulation of the TGF-ß-induced epithelial-to-mesenchymal transition by pan-selective PDE inhibitors in A549 cells
12. Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies
13. Performance and Leakage Analysis of Si and Ge NWFETs Using a Combined Subband BTE and WKB Approach
14. Quantum Mechanical Charge Trap Modeling to Explain BTI at Cryogenic Temperatures
15. The Mysterious Bipolar Bias Temperature Stress from the Perspective of Gate-Sided Hydrogen Release
16. Physical Modeling of Bias Temperature Instabilities in SiC MOSFETs
17. From Gate Oxide Characterization to TCAD Predictions: Exploring Impact of Defects Across Technologies
18. On the Impact of the Gate Work-Function Metal on the Charge Trapping Component of NBTI and PBTI
19. NBTI Degradation and Recovery in Analog Circuits: Accurate and Efficient Circuit-Level Modeling
20. Low Thermal Budget Dual-Dipole Gate Stacks Engineered for Sufficient BTI Reliability in Novel Integration Schemes
21. Gate-Stack Engineered NBTI Improvements in Highvoltage Logic-For-Memory High-ĸ/Metal Gate Devices
22. BTI Reliability Improvement Strategies in Low Thermal Budget Gate Stacks for 3D Sequential Integration
23. Border Trap Based Modeling of SiC Transistor Transfer Characteristics
24. Improved PBTI reliability in junction-less nFET fabricated at low thermal budget for 3D Sequential Integration
25. On the Impact of the Gate Metal Work-Function on the Charge Trapping Component of BTI
26. Characterization and physical modeling of the temporal evolution of near-interfacial states resulting from NBTI/PBTI stress in nMOS/pMOS transistors
27. Characterization of oxide defects in InGaAs MOS gate stacks for high-mobility n-channel MOSFETs (invited)
28. Superior NBTI in High- $k$ SiGe Transistors–Part I: Experimental
29. Superior NBTI in High-k SiGe Transistors–Part II: Theory
30. Benchmarking time-dependent variability of junctionless nanowire FETs
31. Implications of gate-sided hydrogen release for post-stress degradation build-up after BTI stress
32. Efficient physical defect model applied to PBTI in high-κ stacks
33. Accurate mapping of oxide traps in highly-stable black phosphorus FETs
34. Mapping of CMOS FET degradation in bias space—Application to dram peripheral devices
35. Vertically stacked nanowire MOSFETs for sub-10nm nodes: Advanced topography, device, variability, and reliability simulations
36. Complete extraction of defect bands responsible for instabilities in n and pFinFETs
37. A systematic study of charge trapping in single-layer double-gated GFETs
38. The “permanent” component of NBTI revisited: Saturation, degradation-reversal, and annealing
39. Analog-circuit NBTI degradation and time-dependent NBTI variability: An efficient physics-based compact model
40. Nanoscale evidence for the superior reliability of SiGe high-k pMOSFETs
41. On the distribution of the FET threshold voltage shifts due to individual charged gate oxide defects
42. Gate-sided hydrogen release as the origin of "permanent" NBTI degradation: From single defects to lifetimes
43. Charge feedback mechanisms at forward threshold voltage stress in GaN/AlGaN HEMTs
44. Expanding TCAD simulations from grid to cloud
45. Microscopic oxide defects causing BTI, RTN, and SILC on high-k FinFETs
46. The defect-centric perspective of device and circuit reliability — From individual defects to circuits
47. Identification of oxide defects in semiconductor devices: A systematic approach linking DFT to rate equations and experimental evidence.
48. Characterization and modeling of reliability issues in nanoscale devices
49. On the microscopic structure of hole traps in pMOSFETs
50. Advanced modeling of charge trapping: RTN, 1/f noise, SILC, and BTI
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