264 results on '"Sang Lyul Min"'
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2. Learned Performance Model for SSD.
3. CPR for SSDs.
4. Design Tradeoffs for SSD Reliability.
5. An Empirical Study on NVM-based Block I/O Caches.
6. AutoSSD: an Autonomic SSD Architecture.
7. FMMU: a hardware-accelerated flash map management unit for scalable performance of flash-based SSDs.
8. QoS-Aware Flash Memory Controller.
9. Framework for efficient and flexible scheduling of flash memory operations.
10. HIL: A Framework for Compositional FTL Development and Provably-Correct Crash Recovery.
11. P-BMS: A Bad Block Management Scheme in Parallelized Flash Memory Storage Devices.
12. FMMU: A Hardware-Automated Flash Map Management Unit for Scalable Performance of NAND Flash-Based SSDs.
13. Energy-centric DVFS controlling method for multi-core platforms.
14. Flash memory-based development platform for homecare devices.
15. LTFTL: lightweight time-shift flash translation layer for flash memory based embedded storage.
16. Learned Performance Model for SSD
17. Flash memory-based storage device for mobile embedded applications.
18. Evolution of NAND Flash Memory Interface.
19. Virtual framework for testing the reliability of system software on embedded systems.
20. A dynamic code placement technique for scratchpad memory using postpass optimization.
21. A Flexible Tradeoff Between Code Size and WCET Using a Dual Instruction Set Processor.
22. Preemption-aware dynamic voltage scaling in hard real-time systems.
23. Compiler-assisted demand paging for embedded systems with flash memory.
24. Code Generation for a Dual Instruction Set Processor Based on Selective Code Transformation.
25. Dynamic voltage scaling algorithm for fixed-priority real-time systems using work-demand analysis.
26. A Flexible Tradeoff between Code Size and WCET Employing Dual Instruction Set Processors.
27. Buffer Cache Management: Predicting the Future from the Past.
28. Stochastic Analysis of Periodic Real-Time Systems.
29. Embedded System Design Framework for Minimizing Code Size and Guaranteeing Real-Time Requirements.
30. SimDVS: An Integrated Simulation Environment for Performance Evaluation of Dynamic Voltage Scaling Algorithms.
31. Performance Comparison of Dynamic Voltage Scaling Algorithms for Hard Real-Time Systems.
32. On Relaxing Task Isolation in Overrun Handling to Provide Probabilistic Guarantees to Soft Real-Time Tasks with Varying Execution Times.
33. A Dynamic Voltage Scaling Algorithm for Dynamic-Priority Hard Real-Time Systems Using Slack Time Analysis.
34. Copycat: A High Precision Real Time NAND Simulator.
35. An Accurate Instruction-Level Energy Consumption Model for Embedded RISC Processors.
36. Performance Evaluation of the Bluetooth-Based Public Internet Access Point.
37. An Abstract Fault Model for NAND Flash Memory.
38. A Low-Overhead, High-Performance Unified Buffer Management Scheme That Exploits Sequential and Looping References.
39. Towards application/file-level characterization of block references: a case for fine-grained buffer management.
40. Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations.
41. Ozone (O3): An Out-of-Order Flash Memory Controller Architecture.
42. Analysis of the Impacts of Overestimation Sources on the Accuracy of Worst Case Timing Analysis.
43. An Implementation Study of a Detection-Based Adaptive Block Replacement Scheme.
44. On the Existence of a Spectrum of Policies that Subsumes the Least Recently Used (LRU) and Least Frequently Used (LFU) Policies.
45. Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU.
46. Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture.
47. A Flash-Aware Cluster Allocation Scheme for Legacy File Systems.
48. Hardware Platforms for Flash Memory/NVRAM Software Development.
49. Limited Preemptible Scheduling to Embrace Cache Memory in Real-Time Systems.
50. An Adaptive Block Management Scheme Using On-Line Detection of Block Reference Patterns.
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