95 results on '"Sarawadekar, Kishor"'
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2. Robust multi-scale weighting-based edge-smoothing filter for single image dehazing
3. Effective edge-aware weighting filter-based structural patch decomposition multi-exposure image fusion for single image dehazing
4. A New Robust Scale-Aware Weighting-Based Effective Edge-Preserving Gradient Domain Guided Image Filter for Single Image Dehazing
5. Anchors Based Method for Fingertips Position Estimation from a Monocular RGB Image using Deep Neural Network
6. Hybrid Beamforming for Secured mmWave MIMO Communication
7. A Low Cost FPGA Implementation of Retinex Based Low-Light Image Enhancement Algorithm
8. Effectiveness of ANN, LSTM, and Various Supervised Machine Learning Algorithms on Human Activity Recognition
9. A Gesture Elicitation Study with Visually Impaired Users
10. Utilizing gestures to enable visually impaired for computer interaction
11. An eXplainable Self-Attention-Based Spatial–Temporal Analysis for Human Activity Recognition
12. VLSI Design of Saturation-Based Image Dehazing Algorithm
13. Seq2Dense U-Net: Analysing Sequential Inertial Sensor data for Human Activity Recognition using Dense Segmentation Model
14. Towards hand gesture based writing support system for blinds
15. A Gesture Elicitation Study with Visually Impaired Users
16. Small Area Footprint FPGA Architecture for Approximate atan2(a, b) Algorithm
17. VLSI Architecture of Saturation Based Image Dehazing Algorithm and its FPGA Implementation
18. Fingertips Detection With Nearest-Neighbor Pose Particles From a Single RGB Image
19. An FPGA-based architecture of DSC–SRI units specially for motion blind ultrasound systems
20. VLSI design of memory-efficient, high-speed baseline MQ coder for JPEG 2000
21. VLSI-DSP based real time solution of DSC–SRI for an ultrasound system
22. FPGA Implementation of Modular Multiplication for Cryptographic Applications
23. Can Visually Impaired Use Gestures to Interact With Computers? A Cognitive Load Perspective
24. Design of Concurrent Error Detection Techniques for FFT implemented on FPGA platform
25. FPGA Implementation of Chaos based Pseudo Random Number Generator
26. Steering Kernel-Based Guided Image Filter for Single Image Dehazing
27. Gender Recognition using in-built Inertial Sensors of Smartphone
28. A Depthwise Separable Convolution Architecture for CNN Accelerator
29. Exploiting Trigonometric Properties to Optimize Higher Order DCT Architecture in HEVC
30. A Cross Entropy Minimization based Beam Selection for Time-Variant mmWave Beamspace MU-MIMO Communication System
31. Fingertips Detection in Egocentric Video Frames using Deep Neural Networks
32. Performance Study of mmWave Beamspace MU-MIMO-NOMA Communication System
33. Approximated Core Transform Architectures for HEVC Using WHT-Based Decomposition Method
34. Polynomial Learning Rate Policy with Warm Restart for Deep Neural Network
35. Single Image Dehazing using Adaptive Gamma Correction Method
36. A robust wrist point detection algorithm using geometric features
37. WHT and Matrix Decomposition-Based Approximated IDCT Architecture for HEVC
38. An Optimized Architecture of HEVC Core Transform Using Real-Valued DCT Coefficients
39. Multi-Voltage GPIO Design and its Physical Implementation
40. Design and Physical Implementation of a Low Frequency On-Chip Oscillator
41. A New Dactylology and Interactive System Development for Blind–Computer Interaction
42. A Robust Algorithm for Hand-forearm Segmentation
43. Corrigendum to “Towards hand gesture based writing support system for blinds” [Pattern Recognit. 57 (2016) 50–60]
44. Constant throughput HEVC core transform design
45. A low cost, constant throughput and reusable 8#x00D7;8 DCT architecture for HEVC
46. Development of a New Dactylology and Writing Support System Especially for Blinds
47. VLSI Based Performance Enhancement of Image Processing Units for an Ultrasound System
48. A high speed Bit Plane Coder for JPEG 2000 and it's FPGA implementation
49. An FPGA-based architecture of DSC–SRI units specially for motion blind ultrasound systems
50. Area Efficient, High Speed EBCOT Architecture for Digital Cinema
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