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Neutral-Point-Clamped multilevel converters are nowadays a suitable solution to implement low-medium voltage and power applications, thanks to their intrinsic superior voltage and current quality. The conventional configurations of these converters present uneven power loss distribution, causing thermal stress in some power semiconductors, which weakens the power converter reliability. For overcoming it, an implementation of the Neutral-Point-Clamped multilevel converter based on a Switching-Cell Array is introduced, adding redundant conduction paths on one side and more options to distribute the switching losses on the other side. An active thermal control is proposed here to balance the temperature distribution in the converter. A four-level converter has been implemented to evaluate the proposed solution. Experimental results show that the proposed implementation and active thermal control present enhanced temperature distribution in the converter and therefore reduced thermal stress and better reliability.

This letter derives and discusses the superiority of a simple dc-link capacitor voltage control configuration for multilevel neutral-point-clamped converters with any number of levels. The control involves n−2 control loops regulating the difference between the voltage of neighbor capacitors. These control loops are inherently decoupled; i.e., they are independent and the control action of one loop does not affect the others. The good performance of such control is confirmed through simulations and experiments.

© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works This article proposes a novel device designated as an intelligent electronic fuse (iFuse) intended to be connected in series with any current-bidirectional voltage-unidirectional active switch present in a power converter. The iFuse duty is to selectively isolate its series-associated switch from the rest of the converter circuit immediately after detecting that this switch has failed in short circuit. Nonetheless, it maintains the reverse (free-wheeling) current path originally offered by the failed switch. The failure detection is typically performed when the failed switch causes a shoot-through event. Therefore, the iFuse is able to block large currents. The iFuse allows increasing the power-converter fault tolerance and reliability with regard to switch short-circuit failures (SCFs), as in converters featuring switches in parallel, redundant legs, and multilevel neutral-point-clamped topologies. The reliability model analysis of a two-level converter leg with two parallel switches per position reveals that its reliability can be increased up to four times when an iFuse is implemented in series with each switch. The iFuse device feasibility and good performance are verified through experimental tests, proving that it can detect and isolate the associated-switch failure in 6 µs , while stopping short-circuit currents of up to 1 kA without incurring in harmful di / dt values.

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The present paper provides a solution to operate multilevel dual active bridge (ML-DAB) converters built upon neutral point clamped switching legs in a full-bridge disposition and with any number of levels on either side of the converter. The main issue of such converters is addressing the inherent unbalance of the dc-link capacitor voltages, which hinders the proper operation and optimum utilization of the converter. The proposed solution comprises a generalized to N levels modulation and control scheme that allows operating these converters, while guaranteeing the proper balance of the dc-link capacitor voltages. The suitability of the proposed solution is verified through simulation and experimental tests performed in five different converter configurations, three of them with an asymmetric number of voltage levels, proving that capacitor voltage balance is achievable in a wide range of operation conditions. Moreover, the efficiency of the ML-DAB converters is demonstrated to be superior to the conventional two-level DAB case.

This article explores the thermal and reliability benefits of configuring the power semiconductor block of power converters with several small standard power semiconductor devices instead of a few larger ones at a fixed total chip area. The effectiveness of a finer power semiconductor device granularity is analyzed in the context of a synchronous buck converter design under different operating conditions and employing a recently proposed component, the switching-cell array, to implement the semiconductor-component block of the converter. Comparative evalua tions are undertaken under different degrees of granularity and in terms of semiconductor loss distribution, semiconductor temperature distribution, and converter mean time to failure. The article also discusses the thermo-electrical and reliability models employed, and the assumptions made for a fair and straightforward comparison in a generic case. The comparison results reveal that a finer granularity can potentially provide remarkable benefits, although the incremental improvements decrease as the granularity becomes finer. A tradeoff solution must be sought in each specific case balancing the benefits achieved with the added complexity

This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. In presence of grid voltage dips, Low Voltage Ride-Through (LVRT) requirements demand the wind power plant to remain connected to the grid, helping the network to keep voltage and frequency stable. Neutral-Point-Clamped (NPC) converters are appropriate for wind power systems, because the current trend of increasing voltage levels. Predictive current control presents as fast dynamic response and accurate reference tracking as other well established control methods, while providing more flexibility. In this work, three different control strategies are applied to the grid-side NPC converter, in order to fulfil LVRT requirements, which are implemented with the predictive current control technique. Dc-link neutral point voltage is kept balanced by the predictive control algorithm, using the redundant switching states of the NPC converter. Simulation results confirm the validity of the proposed control approach.

This article presents detailed Markov models for the reliability assessment of multilevel neutral-point-clamped (NPC) converter leg topologies, incorporating their inherent fault-tolerance under open-circuit switch faults. The Markov models are generated and discussed in detail for the three-level and four-level active NPC (ANPC) cases, while the presented methodology can be applied to easily generate the models for a higher number of levels and other topology variants. In addition, this article also proposes an extremely fast calculation method to obtain the precise value of the system's mean time to failure from any given formulated system Markov model. This method is then applied to quantitatively compare the reliability of two-level, three-level, and four-level ANPC legs under switch open-circuit-guaranteed faults and varying degrees of device paralleling. The comparison reveals that multilevel ANPC leg topologies inherently present a potential for higher reliability than the conventional two-level leg, questioning the suitability of the traditional search for topologies with the minimum number of devices in order to improve reliability. Experimental results are presented to validate the fault-tolerance assumptions upon which the presented reliability models for the three-level and four-level ANPC legs are based. This article is accompanied by supplementary MATLAB scripts.

The present paper proposes a novel device defined as an intelligent electronic fuse (iFuse) meant to be connected in series with any current-bidirectional voltage-unidirectional active switch present in a given converter. The iFuse duty is to isolate its series- associated switch from the rest of the converter circuit immediately after detecting that said switch has failed in short circuit. Nonetheless, it maintains the reverse (free- wheeling) current path originally offered by the failed switch. The failure detection is performed when the failed switch causes a shoot-through event. Therefore, the iFuse is designed to be able to block the elevated current occurring in such event. The iFuse allows increasing the fault-tolerant capability and the reliability of power converters where such qualities are hindered by switch short-circuit failures, as in converters featuring parallelized switches, neutral-point-clamped multilevel topologies, or redundant legs. The feasibility of the iFuse device is verified through experimental tests, proving that the device is able to detect the failure of its associated switch and isolate it from the rest of the converter circuit in 6 μs, while stopping short-circuit currents of up to 1 kA without incurring in harmful di/dt values.

Neutral-point-clamped (NPC) power conversion topologies are among the most popular multilevel topologies in current industrial products and in industrial and academic research. The proper operation of multilevel three-phase NPC DC–AC converters requires the use of specific pulse-width modulation (PWM) strategies that maintain the DC-link capacitor voltage balance and concurrently optimize various performance factors such as efficiency and harmonic distortion. Although several such PWM strategies have been proposed in the literature, their formulation is often complex and/or covers only particular cases and operating conditions. This manuscript presents a simple formulation of the original virtual-vector-based PWM, which enables capacitor voltage balance in every switching cycle. The formulation is presented, for the general case, in terms of basic phase voltage modulating signals, with no reference to space vectors, involving any number of levels and for any operating conditions, including the overmodulation region. The equivalence of the presented formulation to the original PWM strategy is demonstrated through simulation under different scenarios and operating conditions. Thus, this manuscript offers in a one-stop source a simple, effective, and comprehensive PWM formulation to operate multilevel three-phase NPC DC–AC converters with any number of levels in any operating condition.

Neutral-point-clamped multilevel converters are currently a suitable solution for a wide range of applications. It is well known that the capacitor voltage balance is a major issue for this topology. In this paper, a brief summary of the basic topologies, modulations, and features of neutral-point-clamped multilevel converters is presented, prior to a detailed description and analysis of the capacitor voltage balance behavior. Then, the most relevant methods to manage the capacitor voltage balance are presented and discussed, including operation in the overmodulation region, at low frequency-modulation indexes, with different numbers of AC phases, and with different numbers of levels. Both open- and closed-loop methods are discussed. Some methods based on adding external circuitry are also presented and analyzed. Although the focus of the paper is mainly DC–AC conversion, the techniques for capacitor voltage balance in DC–DC conversion are discussed as well. Finally, the paper concludes with some application examples benefiting from the presented techniques.

© 2017 IEEE. Personal use of this ma terial is permitted. Permission from IEEE must be obtained for al l other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, f or resale or redistribution to se rvers or lists, or reuse of any copyrighted compone nt of this work in other works This paper proposes a modulation strategy for multilevel multiphase diode-clamped dc–ac converters (also applicable to other functionally equivalent topologies) able to keep the dc-link capacitor voltages balanced under passive front ends, low frequency modulation indices (i.e., low number of switching transitions per fundamental cycle), any value of the amplitude modulation index, and any ac-side displacement power factor. A suitable phase voltage pattern with minimum number of switching transitions is presented for the n-level three-phase case. Subsequently, it is extended to higher number of switching transitions per fundamental cycle and to higher number of phases. Simulation results with three, four, and five levels; three and five phases; and several frequency-modulation-index values are presented to validate the proposed modulation strategy. Experimental results obtained with a four-level three-phase dc–ac converter prototype are also provided. The proposed modulation strategy enables the use of this type of converters in applications where the ac fundamental frequency may be close to the switching frequency, such as in high-power systems and variable-speed motor drives.

This paper studies a multilevel multiphase dc-ac conversion system configured by a neutral-point-clamped converter fed by multiple battery packs connected in series. A virtual-vector modulation is selected and a state-of-charge (SoC) balancing control is designed to be able to employ the full battery bank capacity, even under different battery initial SoC values or different battery nominal capacities. The SoC balancing among battery packs is accomplished through the multilevel converter operation in a lossless manner, by simply distributing the dc-to-ac power flow among the batteries according to their SoC. A simple average system model is also presented, which allows performing very fast system simulations over long periods of time and serves as a convenient tool to tune the compensator parameters. The satisfactory performance of the proposed system configuration and control, which can be applied with any number of levels and phases, has been verified through simulations and experiments in a four-level three-phase dc-ac converter fed by three lithium-ion battery packs. The results prove the feasibility and advantages of the proposed system configuration, which can be used to implement conversion systems with different specifications combining several instances of a standard battery pack and a standard power semiconductor device

© 1982-2012 IEEE. Aiming to improve the performance features of conventional two-level dual-active-bridge (DAB) converters, this paper presents a three-level neutral-point-clamped (NPC) DAB dc-dc converter. A general modulation pattern is initially defined, the dc-link capacitor voltage balancing is analyzed in detail, and a proper balancing control is designed. Then, a set of decoupled optimization problems is formulated as a function of the available modulation degrees of freedom to minimize the predominant converter losses. Finally, a simple and practical specific modulation strategy is provided, resembling the optimum solutions. The good performance of the proposed three-level NPC DAB converter operated with the proposed modulation strategy and voltage balancing control is verified through simulation and experiments. The capacitor voltage balancing can be guaranteed for all operating conditions. In addition, it is concluded that the multilevel topology provides benefits compared with the conventional two-level DAB converter.

This article reviews the fundamentals of multilevel multiphase neutral-point-clamped DC–AC power converters. These converters are configured with one or more legs and a common DC-link. Each leg is functionally equivalent to a single-pole multiple-throw switch (n¿=¿3 positions) and it is implemented with a combination of only power semiconductor devices. The main leg topologies are initially presented, both active(transistor) clamped and passive(diode) clamped, for any number of levels. The leg switching states enabling all possible leg positions are subsequently discussed. Then, the set of all possible converter switching states and their standard representation in the converter space vector diagram is systematically derived, starting from the simplest converter (single-phase single-leg) up to the most complex converter with an arbitrary number of phases. The space vector diagram is illustrated for three-, four-, and n-levels in the usual single-phase and three-phase cases. Once the converter states have been characterized, the most common converter control approaches are introduced on the basis of the space vector diagram, including space vector control, space vector modulation, programmed pulse width modulation, hysteresis control, and predictive control. These control strategies are illustrated in simple and conventional DC–AC converter configurations. Finally, the article discusses the DC-link capacitor voltage balance problem, which is inherent to these topologies whenever the DC-link is configured with a capacitive voltage divider. The basics of the different solutions to guarantee the balancing are presented, both through the inclusion of additional hardware and through the application of a suitable converter control strategy

© 20xx IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works Several pulsewidth modulation (PWM) strategies have been proposed for three-phase multilevel converters. Typically, these PWM methods can be either space-vector or carrier-based implemented, where the carrier-based implementation usually presents a lower computation complexity. In this paper, a novel approach for the carrier-based implementation of different existing PWM methods is proposed for three- (3L) and four-level (4L) dc-ac converters, which can be easily extended to any number of levels. The main features of the proposed approach are its reduced computation complexity and computation time. On the other hand, the proposed approach suggests the derivation of novel PWM strategies which can potentially present improved performance features. As an example, two new discontinuous PWM (DPWM) strategies are proposed for the 4L converter. One of these DPWM strategies presents lower weighted total harmonic distortion than other previously proposed strategies. Simulation and experimental results verify the effectiveness of the proposed approach and novel DPWM strategies.

This paper proposes and demonstrates the feasibility of a dual-active-bridge converter built upon four-level active-clamped legs. A suitable modulation pattern is defined. The dc-link capacitor voltage balancing is analyzed and a proper balancing control is designed. The topology, modulation, and balancing control performance are validated through the steady state and transient responses obtained with a set of simulation and experimental tests. An experimental prototype has been built for the experimental tests composed of four four-level active-clamped converter legs and controlled with a dSPACE control platform.

The three-level neutral-point-clamped (3L-NPC) topology is competitive in the large wind energy conversion systems (WECS) thanks to its simple implementation and proper performance compared to other topologies. However, the 3L-NPC topology does not allow distributing power losses evenly among the switching devices, which limits its output power capability. Current literature focuses on the three-level active neutral-point-clamped (3L-ANPC) as an evolution of the 3L-NPC, enabling a more even power loss distribution. However, some devices still suffer from significant switching and conduction power losses with typical commutation sequences. This paper proposes a novel commutation sequence for a 3L-ANPC inverter leg to force that each device mainly withstands either switching or conduction losses. This enables the selection of optimum devices for each position, resulting in an improved converter loss distribution, thermal performance, efficiency, and output power capability. A 2 MW low-voltage WECS is simulated with an electro-thermal model developed in PLECS, reaching a reduction of around 16% in total switching losses. In addition, an enhanced thermal performance is achieved, reducing the maximum junction temperature increase above ambient temperature, on average for all devices, around 4%. The thermal advantages are considerably higher in certain devices, reaching maximum reductions of around 17% in the maximum junction temperature increase above ambient temperature and about 40% in the maximum device junction temperature variation. All reductions are with reference to the conventional commutation sequence.

This letter introduces a new series of multilevel (ML) converters based on the ML clamping concept. By applying this technique, a ML clamping unit (MCU) conveys additional levels for synthesizing the output waveforms of a diode-clamped ML dc-ac power converter. The basic building block of the ML clamping scheme is the ML clamping cell, which is composed of a pair of dc sources associated with one single-pole/triple-throw type of switch arrangement. The number of series-connected ML-clamping cells will set the number of levels of the synthesized waveform. By depending on the MCU arrangements, different converter configurations can be derived, namely, the common clamping and the modular types. Both approaches can be accomplished by employing classical three-level neutral-point-clamped (NPC) technology. Thus, the overall structure of the resultant converter is kept simple, wherein the number of parts count can be reduced, when compared with conventional NPC counterparts. In this letter, emphasis is given on the common clamping converter configuration. The attractiveness of the proposed ML concept is evidenced by conducting a comparative cost analysis. Experimental results are presented as a practicality proof of the proposed ML power converter.