35 results on '"Shih, Jiaw-Ren"'
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2. Embedded Micro-detectors for EUV Exposure Control in FinFET CMOS Technology
3. Design of Wireless Multiple Gases Complementary Architecture Sensors Based on SnSe2 and PtSe2 Layered Films and Oscillating Circuits.
4. An Early Detection Circuit for Endurance Enhancement of Backfilled Contact Resistive Random Access Memory Array
5. Detectors Array for In Situ Electron Beam Imaging by 16-nm FinFET CMOS Technology
6. Advanced self-convergent calibration for selenized 2D film gas sensors
7. 16nm FinFET DUV Detector Array in Fully Compatible FinFET Logic Process
8. Multilevel Fully Logic-Compatible Latch Array for Computing-in-Memory
9. 4K Detectors Array for On-Wafer EUV Imaging in Lithography Control Beyond 5-nm Node
10. A New Self-Powered Wireless Sensing Circuitry for On-Wafer In-Situ EUV Detection
11. Polarity and Patterning Effect on Plasma Charging Levels by Metal-Gate Coupled Recorder Arrays
12. 2T-Pixel Sensors Array for on-Wafer in-Chamber DUV Sensing
13. An Investigation of Plasma Charging Effect on FinFET Front-End-of-Line Processes
14. Complementary Metal–Oxide–Semiconductor Compatible 2D Layered Film‐Based Gas Sensors by Floating‐Gate Coupling Effect
15. Multifunctional Ion‐Sensitive Floating Gate Fin Field‐Effect Transistor with Three‐Dimensional Nanoseaweed Structure by Glancing Angle Deposition Technology
16. Battery-Less Electronic Layer Detectors Array (ELDA) for In-Tool DUV Detection by FinFET CMOS Technology
17. On-Wafer Electronic Layer Detectors Array (ELDA) for e-beam Imaging in Advanced Lithographic Systems
18. Complementary Metal–Oxide–Semiconductor Compatible 2D Layered Film‐Based Gas Sensors by Floating‐Gate Coupling Effect.
19. Multifunctional Ion‐Sensitive Floating Gate Fin Field‐Effect Transistor with Three‐Dimensional Nanoseaweed Structure by Glancing Angle Deposition Technology.
20. On-Wafer FinFET-Based EUV/eBeam Detector Arrays for Advanced Lithography Processes
21. Hair-Like Nanostructure Based Ion Detector by 16nm FinFET Technology
22. Plasma Charge Accumulative Model in Quantitative FinFET Plasma Damage
23. A Statistical Learning Model for Accurate Prediction of Time-Dependent Dielectric Degradation for Low Failure Rates
24. 7nm FinFET Plasma Charge Recording Device
25. Advanced self-convergent calibration for selenized two-dimensional film gas sensors
26. Time dependent junction degradation in FinFET
27. Reliability aging and modeling of chip-package interaction on logic technologies featuring high-k metal gate planar and FinFET transistors
28. Reliability aging and modeling of chip-package interaction on logic technologies featuring high-k metal gate planar and FinFET transistors
29. Mechanism of instability on device's characteristics due to intermetal dielectrics with low-k material and the modified process.
30. Advanced integrated process and ESD protection structure to optimize the GOI, HCE, and ESD performance for subquarter micron technology.
31. Advanced integrated process and ESD protection structure to optimize the GOI, HCE, and ESD performance for subquarter micron technology
32. Mechanism of instability on device's characteristics due to intermetal dielectrics with low-k material and the modified process
33. The Method to Optimize Gate Oxide Integrity, Hot Carrier Effect and Electro-Static Discharge without Sacrificing the Performance in Sub-Quarter Micron Dual Gate Oxide Process
34. Analytical Model of Human Body Model Electrostatic Discharge Current Distribution and Novel Electrostatic Discharge Protection Structure
35. A Novel Thin Gate-Oxide-Thickness Measurement Method by LDD (Lightly-Doped-Drain)- NMOS (N-Channel Metal-Oxide-Semiconductor) Transistors
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