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A TX power calibration loop with high accuracy for millimeter-Wave (mm-Wave) automotive radar application is presented. The loop consists of a calibration logic, a variable gain amplifier (VGA), a power amplifier, a power detector, an analog-to-digital convertor (ADC) and a temperature sensor fabricated in a 40-nm CMOS process. The digital power calibration loop is implemented to adjust the monitored detector output voltage to a predetermined target voltage according to a temperature by controlling the gain of the VGA. To achieve high power accuracy and stability against temperature variation, the proposed power detector is designed to realize flat or monotonic characteristics against temperatures by optimizing a second distortion. Measured calibrated output power shows 10 dBm ±0.5 dB over wide temperatures ranging from −20 °C to 125 °C.

This paper presents a fully integrated 77 GHz transceiver for long range automotive radar with a 2 × 8 time-division-multiplexing multi-input multi-output (TDM-MIMO) technique in 40 nm CMOS technology. The MMIC integrates an 8-channel receiver (RX), a 3-channel transmitter (TX), a phase locked loop (PLL), a TX power detector and a power calibration loop, an SRAM, an eFuse, a temperature compensation calibration loop with look up table (LUT) and a temperature sensor, a serial peripheral interface (SPI), and a MIMO control logic. The RX shows noise figure (NF) of 8.7 dB and input-referred 1 dB compression point (IP1dB) of −7.4 dBm. The RX with the worst condition shows NF of 14 dB and IP1dB of −10 dBm. The TX shows output power of 14.1 dBm and phase noise of −116 dBc/Hz at 12.5 MHz offset frequency. The radar module demonstrates the detection range of 250 m.

This paper presents a 79 GHz transmitter with a saturation output power of more than 13.5 dBm at 150°C for automotive radar applications. It includes a phase shifter, a doubler, a variable gain amplifier, a power amplifier and a power detector. A compact fully differential reflection-type phase shifter has been developed at a local frequency band of 40 GHz. A power amplifier is operated with a low supply voltage of 0.9 V to avoid a reliability degradation due to hot carrier injection. The transmitter demonstrates the output power and a maximum phase shift of more than 360° at 150°C from 75 GHz to 82 GHz. A total current consumption is 770 mA at 150°C. The transmitter is implemented using 40 nm CMOS technology. The size is $500 \mu \mathrm{m}\times 800\mu \mathrm{m}$ .

A novel beamforming (BF) technique (MIDC: Multiple sector-ID Capture) is proposed for 60-GHz band WLAN/PAN systems. In contrast to conventional BF techniques adopted in 60-GHz band standards, where quasi-omni (Q-omni) antenna radiation patterns are utilized, MIDC precisely detects the best link even when the Q-omni pattern is imperfect. Furthermore, it can reserve multiple antenna settings corresponding to existing communication links in the initial training by making use of the quasi-optical nature of millimeter-waves. This enables fast beam switching when link blockage occurs. The training is executed in short durations by putting together DoA/DoD-estimation and “beam-combining” techniques. The basic function of MIDC is verified experimentally in a simple multipath propagation environment by using our 60-GHz CMOS transceiver LSIs integrated with planar phased-array antennas. MIDC has been adopted in the MAC/PHY specification of the primary 60-GHz band standards: WiGig (Wireless Gigabit Alliance) and IEEE 802.11ad.

This paper presents a 60-GHz-band times12 multiplier and its application to a transceiver module. The multiplier consists of a quadrupler and a following tripler. For low dc power consumption, gatewidths of field-effect transistors are optimized. A cascode amplifier is adopted to obtain required output power levels. The fabricated multiplier exhibits output power higher than 0 dBm from 57 to 62 GHz with input power higher than -10 dBm. Spurious harmonic suppressions up to the 20th order are larger than 20 dBc with a desired 12th signal at a frequency of 60 GHz. DC power consumption is 185 mW. A transmitter module with the multiplier is assembled using a flip-chip bonding technique. Bit error rate is measured using amplitude shift-keying modulation with a data rate over 1 Gb/s

This paper presents the design and performance of 60-GHz-band coplanar monolithic microwave integrated circuit (MMIC) active filters. To compensate for the loss of the passive filter, a resonator composed of a quarter-wavelength line is terminated by a circuit with a constant negative resistance over a wide frequency band. Cross-coupling is introduced to make the attenuation poles on both sides of the passband. We develop two types of two-stage filter: one with medium bandwidth and the other with narrow bandwidth. The former shows an insertion loss of 3.0 dB with a 3-dB bandwidth of 2.6 GHz and a rejection of larger than 20 dB at a 3-GHz separation from a center frequency of 65.0 GHz. This filter also shows a noise figure of 10.5 dB. The latter filter shows an insertion loss of 2.8 dB with a 10-dB bandwidth of 2.1 GHz at a center frequency of 65.0 GHz. It also shows an output power of 5.0 dBm at a 1-dB compression point. The loss variation due to temperature variation is successfully compensated using a gate bias control circuit. The size of the MMIC filters is 2.5 mm/spl times/1.1 mm.

A highly integrated, low-spurious E-band MMIC frequency converter, which comprises a sub-harmonic mixer with an LO multiplier and a carrier driver, is presented. An APDP (Anti-Parallel Diode Pair) is used to the mixer and the multiplier so as to prevent a carrier leakage and the 2nd harmonic of an input LO, respectively. Several filters are also applied to suppress some spurious signals from the circuits. An MMIC is fabricated in 0.13um GaAs pHEMT technology, and measurement results show that a ratio between the desired carrier and the other spurious signals is as high as > 50 dB, and that the mixer has conversion loss of 51 dB. Furthermore, the fabricated MMIC is applied to E-band equipment, where 1.2Gbps 64QAM wireless communication with 250MHz bandwidth (spectral efficiency of 4.8 bit/s/Hz) is achieved.

A 60-GHz band phased array transmitter is developed based on 90-nm CMOS process featuring compact baseband phase shifters with ideally zero power consumption. The phase shifter changes an RF signal phase every π/2 by switching baseband signal paths. The transmitter has 6 RF front-ends and 6 phase shifters to implement beam steering function for a 1 × 6 array antenna system. Each of the RF front-ends exhibits typically a power of 0 dBm at 1-dB compression point, a conversion gain of 15 dB, and a 3-dB bandwidth of 600 MHz. By controlling phase shifters, the beam steering from 0 to 60 degree is observed. The chip size is 5 mm × 2.5 mm. The circuit consumes 960 mW at 1.0 V supply.

This paper presents recent progress on 60-GHz-band MMIC developments based on standard 90-nm CMOS technology. For a low-noise amplifier (LNA), a simple noise model is employed to facilitate efficient design in the millimeter- wave range. For a power amplifier (PA), a reliability issue due to degradation of hot carrier injection should be carefully considered for large-signal operation. To maximize output power while ensuring sufficient lifetime, we have established PA design process including co-simulation technique. The developed LNA achieves a noise figure of 5.7 dB with 13-dB gain at 63 GHz. On the other hand, PA exhibits a saturated output power of 8.5 dBm with 15.2-dB linear gain at 60 GHz with a supply voltage as low as 0.7 V where sufficient lifetime is expected. Finally, transmitter and receiver front-end circuits are demonstrated for 2.6-Gbps QPSK operation.

A 60-GHz-band compact IQ modulator MMIC with a double-balanced mixer configuration is developed for ultra-high-speed wireless transceivers. The IQ modulator includes asymmetric baluns and an LO driver amplifier in a 2.5 mm times 1.15 mm chip to obtain differential signals in a CPW scheme and to mitigate the requirements for LO input power, respectively. The chip size of the CPW balun is markedly reduced by introducing CPS transmission lines in place of lambda/2-lines. When the fabricated modulator MMIC is operated as an SSB mixer, it shows a conversion gain of -11.1 dB at an LO input power of 0 dBm. Under the vector signal measurements, the fabricated modulator shows EVM values of less than 4 % and 5.5 % for QPSK and 16QAM at a symbol rate of 15 Msps in the carrier frequency range of 59 to 66 GHz

This paper presents a 60 GHz-band times12 multiplier MMIC. The multiplier consists of a quadrupler and a following tripler. In order to integrate them in a single chip with a size of 2.5 mm times 1.15 mm, lumped elements are adopted for matching and suppression circuits. A capacitor is introduced between fundamental and 2nd harmonic suppression stubs of a quadrupler so as to improve the suppression level. The fabricated multiplier exhibits an output power of higher than 0 dBm from 58 to 63 GHz with an input power of -5 dBm. The adjacent 11 th and 13th harmonic suppressions are larger than 20 dBc at a center frequency of 60.6 GHz. The multiplier is also mounted in an LTCC package using a flip-chip bonding technique. The flipped multiplier shows a decrease of 4 dB in the output power in the temperature range from -20 to 80 degC. As far as the authors know, this is the first times12 FET-multiplier MMIC in a millimeter-wave band

A wireless uncompressed high-definition television (HDTV) signal transmission system utilizing a 60-GHz-band transmitter and two receivers is proposed and developed for indoor use. The system is capable of transmitting video signals with 1080i/720p formats and stereo audio signals as 1-Gb/s serial data stream. The compact transmitter and receiver are highlighted, each size of which is 50 mm /spl times/ 70 mm /spl times/ 15 mm. An output peak power of 10 mW and a minimum received power of -52 dBm are achieved. The wide-beam planar antennas allow less strict alignment for the wireless equipments with a maximum transmission distance of 7 m. Furthermore, path diversity technique is introduced to reduce the opportunities of shadowing by a human body around a television set.

This paper presents 60-GHz-band module technology for gigabit wireless systems. All millimeter-wave components described here are flip-chip mountable devices, providing highly repeatable interconnects even for such a high-frequency range. For multi-chip modules, multi-layer LTCC substrates with cavity structures are employed, where MMICs, filters and dielectric resonator oscillators are mounted. Once the module fabrication is completed, only DC feeding and baseband I/O should be cared to connect with printed wiring boards. For 60-GHz-band ASK modules, modulation/demodulation with a speed more than 1 Gb/s and an output power of 10 mW are achieved. The modules are implemented in several applications. The uncompressed high-definition video transmission systems are highlighted.

This paper presents a 30 GHz-band oscillator with a temperature stable dielectric resonator (DR). The DR is formed incorporating metalized through holes in a dielectric substrate. An oscillator MMIC is stacked on the DR using flip-chip bonding. A fabricated dielectric resonator oscillator (DRO) shows an output power of larger than +10 dBm and a phase noise of less than -90 dBc/Hz at 1 MHz-offset with an oscillation frequency of around 31.7 GHz. The frequency change is /spl plusmn/315 ppm over a temperature range from -25 to +100 /spl deg/C. The size of the DRO is 4.3 mm /spl times/ 3.8 mm /spl times/ 0.4 mm.

A 1.25 Gbps 60 GHz-band full duplex wireless Gigabit Ethernet link has been developed. Direct ASK modulation and demodulation scheme is adopted for the 60 GHz-band transceiver. CPW MMIC's and planar filters are flip-chip mounted in TX and RX LTCC MCM's. The wireless Gigabit Ethernet link has the function of converting an optical fiber link to a wireless link seamlessly combining a 60 GHz-band transceiver with a 1000Base-SX optical in/out module. The size is 159/spl times/97/spl times/44 mm/sup 3/.

This paper presents the design and performance of a 60 GHz-band coplanar active filter. To compensate the loss of a passive filter, a resonator composed of a quarter-wavelength line is terminated by a negative resistance circuit. A cross-coupling is introduced to make attenuation poles at both sides of the pass-band. A fabricated filter with two resonators shows an insertion loss of 3.0 dB with a rejection of greater than 20 dB at 3 GHz-separation from a center frequency of 65.0 GHz. The size of the filter is 2.5 mm /spl times/ 1.1 mm.

A 1.25 Gb/s 60 GHz-band compact transceiver module uses ASK modulation. CPW MMICs and planar filters are flip-chip mounted in TX and RX LTCC MCMs. The transmitter exhibits 9.6 dBm output power. The receiver shows -50 dBm minimum received power for 1.25 Gb/s error-free transmission. The transceiver module is 82/spl times/53/spl times/7 mm/sup 3/ (30 cc).