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2. Understanding advanced DRAM edge placement error budget and opportunities for control

3. Experimental verification of on-product overlay improvement by intra-lot overlay control using metrology based grouping

4. Holistic feedforward control for the 5 nm node and beyond.

5. Holistic feedforward control for the 5 nm logic node and beyond

6. Virtual overlay metrology for fault detection supported with integrated metrology and machine learning

7. Solution for high-order distortion on extreme illumination condition using computational prediction method

9. Overlay improvements using a real time machine learning algorithm

12. Understanding advanced DRAM edge placement error budget and opportunities for control

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