87 results on '"Smedes, T."'
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2. ESD testing of devices, ICs and systems
3. Podcast: wetenschap en spiritualiteit
4. Selecting an appropriate ESD protection for discrete RF power LDMOSTs
5. The application of transmission line pulse testing for the ESD analysis of integrated circuits
6. Bijbelse scheppingsverhalen
7. Evolutietheorie: Darwin en verder
8. Evolutie en de vraag naar God
9. JS-002 module and product CDM result comparison to JEDEC and ESDA CDM methods
10. Why Religious Experience is considered Personal and Dubitable - and what if it were not
11. Evolutie, cultuur en religie : perspectieven vanuit biologie en theologie
12. Inleiding
13. Effect of Velocity Saturation on Small Signal Behaviour of Submicron MOSFETs: Analytical Modelling and 2-D Simulations
14. Impact of layout and technology variation on the CDM performance of ggNMOSTs and SCRs
15. The influence of technology variation on ggNMOST and SCRs against CDM ESD stress
16. Bijbelse scheppingsverhalen
17. Evolutie en de vraag naar God
18. Leven met Darwin - Cultuur en religie in evolutionair perspectief
19. Evolutietheorie: Darwin en verder
20. Harmful voltage overshoots due to turn-on behaviour of ESD protections during fast transients
21. Characterization methods to replicate EOS fails.
22. Analysis of ESD fails in a 45 nm mixed signal SoC.
23. A contribution to the evaluation of HMM for IO design.
24. Predictive CDM simulation approach based on tester, package and full integrated circuit modeling.
25. Pitfalls for CDM calibration procedures.
26. On-chip system level protection of FM antenna pin.
27. A DRC-based check tool for ESD layout verification.
28. A methodology for the ESD test reduction for complex devices.
29. On the relevance of IC ESD performance to product quality.
30. Relations between system level ESD and (vf-)TLP.
31. Selecting an appropriate esd protection for discrete RF power LDMOSTs.
32. A simple design methodology for increased ESD robustness of CMOS core cells.
33. ESD phenomena in interconnect structures.
34. ESD protection by keep-on design for a 550 V fluorescent lamp control IC with integrated LDMOS power stage.
35. The impact of substrate resistivity on ESD protection devices.
36. Automatic layout based verification of electrostatic discharge paths.
37. The application of Transmission Line Pulse testing for the ESD analysis of integrated circuits.
38. An analytical model for the Non-Quasi-Static small-signal behaviour of submicron MOSFETs
39. Influence of channel series resistances on dynamic MOSFET behaviour
40. Boundary element methods for 3D capacitance and substrate resistance calculations in inhomogeneous media in a VLSI layout verification package
41. A new description of dual γ-factor threshold voltage with continuous second-order derivative
42. A Simple Model for Analogue Applications of Dynamic Threshold MOSTs.
43. Practical modeling of the effects of processing fluctuations on circuit behaviour.
44. Effects of the lightly doped drain configuration on capacitance characteristics of submicron MOSFETs.
45. Statistical modeling and circuit simulation for design for manufacturing.
46. Accurate interconnect modeling.
47. Extraction of circuit models for substrate cross-talk.
48. Accurate interconnect modeling.
49. Fast computation of substrate resistances in large circuits.
50. Layout Extraction of 3D Models for Interconnect and Substrate Parasitics.
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