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Highly ordered nanocrystal (NC) assemblies, namely superlattices (SLs), have been investigated as novel building blocks of optical and optoelectronic devices due to their unique properties based on interactions among neighboring NCs. In particular, lead halide perovskite NC SLs have attracted significant attention, owing to their extraordinary optical characteristics of individual NCs and collective emission processes like superfluorescence (SF). So far, the primary method for preparing perovskite NC SLs has been the drying-mediated self-assembly method, in which the colloidal NCs spontaneously assemble into SLs during solvent evaporation. However, this method lacks controllability because NCs form random-sized SLs at random positions on the substrate rendering NC assemblies in conjunction with device structures such as photonic waveguides or microcavities challenging. Here, we demonstrate template-assisted self-assembly to deterministically place perovskite NC SLs and control their geometrical properties. A solution of CsPbBr3 NCs is drop-casted on a substrate with lithographically-defined hollow structures. After solvent evaporation and removal of excess NCs from the substrate surface, NCs only remain in the templates thereby defining the position and size of these NC assemblies. We performed photoluminescence (PL) measurements on these NC assemblies and observed signatures of SF, similar as in spontaneously assembled SLs. Our findings are crucial for optical devices that harness embedded perovskite NC assemblies and prepare fundamental studies on how these collective effects can be tailored through the SL geometry.

With remarkable electrical and optical switching properties induced at low power and near room temperature (68C), vanadium dioxide (VO2) has sparked rising interest in unconventional computing among the phase-change materials research community. The scalability and the potential to compute beyond the von Neumann model make VO2 especially appealing for implementation in oscillating neural networks for artificial intelligence (AI) applications, to solve constraint satisfaction problems, and for pattern recognition. Its integration into large networks of oscillators on a Silicon platform still poses challenges associated with the stabilization in the correct oxidation state and the ability to fabricate a structure with predictable electrical behavior showing very low variability. In this work, the role played by the different annealing parameters applied by three methods (slow thermal annealing, flash annealing, and rapid thermal annealing), following the vanadium oxide atomic layer deposition (ALD), on the formation of VO2 grains is studied and an optimal substrate stack configuration that minimizes variability between devices is proposed. Material and electrical characterizations are performed on the different films and a step-by-step recipe to build reproducible VO2-based oscillators is presented, which is argued to be made possible thanks to the introduction of a hafnium oxide (HfO2) layer between the silicon substrate and the vanadium oxide layer. Up to seven nearly identical VO2-based devices are contacted simultaneously to create a network of oscillators, paving the way for large-scale implementation of VO2 oscillating neural networks.

The seamless integration of III-V nanostructures on silicon is a long-standing goal and an important step towards integrated optical links. In the present work, we demonstrate scaled and waveguide coupled III-V photodiodes monolithically integrated on Si, implemented as InP/In0.5Ga0.5As/InP p-i-n structure. The waveguide coupled devices show a dark current down to 0.048 A/cm2 at -1 V and a responsivity up to 0.2 A/W at -2 V. Using grating couplers centered around 1320 nm, we observed a cutoff frequency f3dB exceeding 70 GHz and data reception at 50 GBd with OOK and 4PAM. When operated in forward bias as light emitting diode, the devices emit light centered at 1550 nm. Furthermore, we also investigate the self-heating of the devices using scanning thermal microscopy and find a temperature increase of only ~15 K during the device operation as emitter, in accordance with thermal simulation results.

Photonic crystal (PhC) cavities are promising candidates for Si photonics integrated circuits due to their ultrahigh quality (Q)-factors and small mode volumes. Here, we demonstrate a novel concept of a one-dimensional hybrid III-V/Si PhC cavity which exploits a combination of standard silicon-on-insulator technology and active III-V materials. Using template-assisted selective epitaxy, the central part of a Si PhC lattice is locally replaced with III-V gain material. The III-V material is placed to overlap with the maximum of the cavity mode field profile, while keeping the major part of the PhC in Si. The selective epitaxy process enables growth parallel to the substrate and hence, in-plane integration with Si, and in-situ in-plane homo- and heterojunctions. The fabricated hybrid III-V/Si PhCs show emission over the entire telecommunication band from 1.2 {\mu}m to 1.6 {\mu}m at room temperature validating the device concept and its potential towards fully integrated light sources on silicon., Comment: 10 pages, 5 figures

A key component for optical on-chip communication is an efficient light source. However, to enable low energy per bit communication and local integration with Si CMOS, devices need to be further scaled down. In this work, we fabricate micro- and nanolasers of different shapes in InP by direct wafer bonding on Si. Metal-clad cavities have been proposed as means to scale dimensions beyond the diffraction limit of light by exploiting hybrid photonic-plasmonic modes. Here, we explore the size scalability of whispering-gallery mode light sources by cladding the sidewalls of the device with Au. The metal clad cavities demonstrate room temperature lasing upon optical excitation for Au-clad devices with InP diameters down to 300 nm, while the purely photonic counterparts show lasing only down to 500 nm. Numerical thermal simulations support the experimental findings and confirm an improved heat-sinking capability of the Au-clad devices, suggesting a reduction in device temperature of 473 K for the metal-clad InP nanodisk laser, compared to the one without Au. This would provide substantial performance benefits even in the absence of a hybrid photonic-plasmonic mode. These results give us insight into the benefits of metal-clad designs to downscale integrated lasers on Si., Comment: 15 pages, 7 figures

Controlling crystalline material defects is crucial, as they affect properties of the material that may be detrimental or beneficial for the final performance of a device. Defect analysis on the sub-nanometer scale is enabled by high-resolution (scanning) transmission electron microscopy [HR(S)TEM], where the identification of defects is currently carried out based on human expertise. However, the process is tedious, highly time consuming and, in some cases, yields ambiguous results. Here we propose a semi-supervised machine learning method that assists in the detection of lattice defects from atomic resolution microscope images. It involves a convolutional neural network that classifies image patches as defective or non-defective, a graph-based heuristic that chooses one non-defective patch as a model, and finally an automatically generated convolutional filter bank, which highlights symmetry breaking such as stacking faults, twin defects and grain boundaries. Additionally, we suggest a variance filter to segment amorphous regions and beam defects. The algorithm is tested on III-V/Si crystalline materials and successfully evaluated against different metrics, showing promising results even for extremely small training data sets. By combining the data-driven classification generality, robustness and speed of deep learning with the effectiveness of image filters in segmenting faulty symmetry arrangements, we provide a valuable open-source tool to the microscopist community that can streamline future HR(S)TEM analyses of crystalline materials., Comment: 11 pages + references and appendix, 5 figures. V2: Added references. Corrected typos. Elaborated methodology. In sample figure, replaced grain boundary image with more representative image. Results are unchanged

The thermoelectric properties of a nanoscale germanium segment connected by aluminium nanowires are studied using scanning thermal microscopy. The germanium segment of 168\,nm length features atomically sharp interfaces to the aluminium wires and is surrounded by an Al$_2$O$_3$ shell. The temperature distribution along the self-heated nanowire is measured as a function of the applied electrical current, for both Joule and Peltier effects. An analysis is developed that is able to extract the thermal and thermoelectric properties including thermal conductivity, the thermal boundary resistance to the substrate and the Peltier coefficient from a single measurement. Our investigations demonstrate the potential of quantitative measurements of temperature around self-heated devices and structures down to the scattering length of heat carriers., Comment: Main Text: 10 pages, 5 figures Supplementals: 7 pages, 8 figures

Phase-change materials (PCMs), which are well-established in optical and random-access memories, are increasingly studied for emerging topics such as brain-inspired computing and active photonics. These applications take advantage of the pronounced reflectivity and resistivity changes that accompany the structural transition in PCMs from their amorphous to crystalline state. However, PCMs are typically fabricated as thin films via sputtering, which is costly, requires advanced equipment, and limits the sample and device design. Here, we investigate a simpler and more flexi-ble approach for applications in tunable photonics: the use of sub-10 nm colloidal PCM nanoparticles (NPs). We report the optical properties of amorphous and crystalline germanium telluride (GeTe) NP thin films from the infrared to the ultraviolet spectral range. Using spectroscopic ellipsometry with support from cross-sectional scanning electron microscopy, atomic force microscopy, and absorption spectroscopy, we extract refractive indices n, extinction coefficients k, and band gaps Eg and compare to values known for sputtered GeTe thin films. We find a decrease of n and k and an increase of Eg for NP-based GeTe films, yielding insights into size-dependent property changes for nanoscale PCMs. Furthermore, our results reveal the suitability of GeTe NPs for tunable photonics in the near-infrared and visible spectral range. Finally, we studied sample reproducibility and aging of our NP films. We found that the colloidally-prepared PCM thin films were stable for at least two months stored under nitrogen, further supporting the great promise of these materials in applications., Comment: Optical Materials Engineering Laboratory, ETH Zurich, 8092 Zurich, Switzerland. IBM Research-Zurich, R\"uschlikon, Switzerland. Materials and Device Engineering Group, Department of Information Technology and Electrical Engineering, ETH Zurich, 8092 Zurich, Switzerland

Neuromorphic computing architectures enable the dense co-location of memory and processing elements within a single circuit. This co-location removes the communication bottleneck of transferring data between separate memory and computing units as in standard von Neuman architectures for data-critical applications including machine learning. The essential building blocks of neuromorphic systems are non-volatile synaptic elements such as memristors. Key memristor properties include a suitable non-volatile resistance range, continuous linear resistance modulation and symmetric switching. In this work, we demonstrate voltage-controlled, symmetric and analog potentiation and depression of a ferroelectric Hf$_{57}$Zr$_{43}$O$_{2}$ (HZO) field effect transistor (FeFET) with good linearity. Our FeFET operates with a low writing energy (fJ) and fast programming time (40 ns). Retention measurements have been done over 4-bits depth with low noise (1%) in the tungsten oxide (WO$_{x}$) read out channel. By adjusting the channel thickness from 15nm to 8nm, the on/off ratio of the FeFET can be engineered from 1% to 200% with an on-resistance ideally >100 kOhm, depending on the channel geometry. The device concept is using earth-abundant materials, and is compatible with a back end of line (BEOL) integration into complementary metal-oxidesemiconductor (CMOS) processes. It has therefore a great potential for the fabrication of high density, large-scale integrated arrays of artificial analog synapses., Comment: 14 pages, 5 figures, supplementary information available, submitted to ACS Applied Materials & Interfaces