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Photonic integrated circuits (PICs) for next-generation optical communication interconnects and all-optical signal processing require efficient (∼A/W) and fast (≥25 Gbs–1) light detection at low (–1) power consumption, in devices compatible with Si processing, so that the monolithic integration of electro-optical materials and electronics can be achieved consistently at the wafer scale. Graphene-based photodetectors can meet these criteria, thanks to their broadband absorption, ultra-high mobility, ultra-fast electron interactions, and strong photothermoelectric effect. High responsivities (∼ 1 A/W), however, have only been demonstrated in biased configurations, which introduce dark current, noise, and power consumption, while unbiased schemes, with low noise and zero consumption, have remained in the ∼ 0.1 A/W regime. Here, we consider the unbiased asymmetric configuration and show that optimized plasmonic enhanced devices can reach for both transverse-electric and transverse-magnetic modes (at λ = 1550 nm), ∼A/W responsivity, and ∼ 100 GHz operation speed at zero power consumption. We validate the model and material parameters by simulating experimental devices and derive analytical expressions for the responsivity. Our comprehensive modeling paves the way for efficient, fast, and versatile optical detection in PICs with zero power consumption.

We present the first experimental demonstration of a bi-modal plasmonic interferometer with an extinction ratio (ER) of 4 dB. Theory predicts 6.500 nm/RIU sensitivity and up to 17 dB ER.

We show detection of CO2 concentrations as low as 500 ppm using a suspended silicon photonic mid-IR waveguide. The performance is enabled by the low propagation loss (2.35 ± 0.25) dB/cm permitting sensing with waveguides up to 7 cm in length.

Advanced functional materials 2103936 (2021). doi:10.1002/adfm.202103936, Published by Wiley-VCH, Weinheim

Optical refractive index (RI) sensors exploiting selective co-integration of plasmonics with silicon photonics in Lab-on-achip configurations are expected to disrupt Point-of-Care (POC) diagnostics, delivering performance and economic breakthroughs. Propagating surface-plasmon-polariton modes offer superior sensitivity due to their extreme overlap with the surrounding medium. In parallel, low-loss photonics act as the hosting platform with which the plasmonic losses can be sustained while allowing for multiplexed layouts via in-plane SPP excitation schemes. However, merging plasmonics with silicon photonics in a cost-effective manner, requires a truly CMOS-compatible manufacturing process. Herein, we demonstrate experimentally, the highest bulk-sensitivity among all the plasmo-photonic interferometric RI sensors, while taking the leap forward in the development of a CMOS-manufactured plasmo-photonic sensing platform merging Si3N4 photonics and aluminum plasmonics. The proposed structure relies on a butt-coupled interface between Si3N4 waveguides and a 70 μm long plasmonic stripe, deployed in one branch of a Mach-Zehnder Interferometer (MZI) serving as the sensing transducer that detects local changes in the refractive index. The lower MZI arm (reference arm) exploits the low-loss Si3N4 platform to deploy a MZI-based variable optical attenuator followed by a thermo-optic phase shifter to optimize the sensor performance achieving resonance extinction ratio values at the MZI output of more than 35 dB. Experimental evaluation of a gold-based sensor revealed a bulk refractive index sensitivity of 1930 nm/RIU. In addition, we experimentally demonstrate that the proposed plasmo-photonic waveguide platform can migrate from gold (Au) to Aluminum (Al), demonstrating the first step towards a fully CMOS compatible plasmo-photonic interferometric sensor.

We demonstrate a CMOS compatible interferometric plasmo-photonic sensor exploiting SisN4 photonic and aluminum (Al) plasmonic stripe waveguides. Experimental evaluation revealed bulk sensitivity of 4764 nm/RIU, holding promise for ultra-sensitive and low cost sensing devices.

Optical refractive-index sensors exploiting selective co-integration of plasmonics with silicon photonics has emerged as an attractive technology for biosensing applications that can unleash unprecedented performance breakthroughs that reaps the benefits of both technologies. However, towards this direction, a major challenge remains their integration using exclusively CMOS-compatible materials. In this context, herein, we demonstrate, for the first time to our knowledge, a CMOS-compatible plasmo-photonic Mach-Zehnder-interferometer (MZI) based on aluminum and Si3N4 waveguides, exhibiting record-high bulk sensitivity of 4764 nm/RIU with clear potential to scale up the bulk sensitivity values by properly engineering the design parameters of the MZI. The proposed sensor is composed of Si3N4 waveguides butt-coupled with an aluminum stripe in one branch to realize the sensing transducer. The reference arm is built by Si3N4 waveguides, incorporating a thermo-optic phase shifter followed by an MZI-based variable optical attenuation stage to maximize extinction ratio up to 38 dB, hence optimizing the overall sensing performance. The proposed sensor exhibits the highest bulk sensitivity among all plasmo-photonic counterparts, while complying with CMOS manufacturing standards, enabling volume manufacturing.

Graphene / silicon (G/Si) heterostructures have been studied extensively in the past years for applications such as photodiodes, photodetectors and solar cells, with a growing focus on efficiency and performance. Here, a specific contact pattern scheme with interdigitated Schottky and graphene/insulator/silicon (GIS) structures is explored to experimentally demonstrate highly sensitive G/Si photodiodes. With the proposed design, an external quantum efficiency (EQE) of > 80 % is achieved for wavelengths ranging from 380 to 930 nm. A maximum EQE of 98% is observed at 850 nm, where the responsivity peaks to 635 mA/W, surpassing conventional Si p-n photodiodes. This efficiency is attributed to the highly effective collection of charge carriers photogenerated in Si under the GIS parts of the diodes. The experimental data is supported by numerical simulations of the diodes. Based on these results, a definition for the true active area in G/Si photodiodes is proposed, which may serve towards standardization of G/Si based optoelectronic devices., 24 pages, 5 figures

Integration of plasmonic waveguides with low-loss photonic platforms have attracted research efforts as the means to benefit from the extra-ordinary features of plasmonics while enhancing the functional portfolio of Photonic Integrated Circuits (PICs). In this work, we review a technology platform that integrates water cladded plasmonic waveguides integrated in a low-loss Si 3 N 4 photonic platform, targeting biosensing applications. Results obtained experimentally and numerically will be presented with respect to propagation losses, interface coupling loss and accumulated phase change per unit length, showing how Surface Plasmon Polariton (SPP) waveguides can be effectively combined with photonic components in order to demonstrate low-cost and ultra-sensitive optical biosensors.

2018 76th Device Research Conference (DRC) : 24-27 June 2018 / [IEEE Electron Device Society (EDS) - ​technical co-sponsor ; Materials Research Society (MRS) - co-sponsor] 2018 76th Device Research Conference, DRC, Santa Barbara, CA, USA, 24 Jun 2018 - 27 Jun 2018; Piscataway, NJ : IEEE 2 Seiten (2018). doi:10.1109/DRC.2018.8442221, Published by IEEE, Piscataway, NJ

2018 76th Device Research Conference (DRC) : 24-27 June 2018 / [IEEE Electron Device Society (EDS) - ​technical co-sponsor ; Materials Research Society (MRS) - co-sponsor] 76th Device Research Conference, DRC 2018, Santa Barbara, CA, USA, 24 Jun 2018 - 27 Jun 2018; Piscataway, NJ : IEEE 2 Seiten (2018). doi:10.1109/DRC.2018.8442228, Published by IEEE, Piscataway, NJ

In this study, the impact of impurities incorporated into plated nickel seed layer on silicide formation and the influence of annealing temperature on the fill-factor (FF) loss of solar cells with Ni-Cu contacts is investigated. The silicide growth of electro-less plated nickel seed layer is significantly retarded compared with literature data on physical-vapor-deposition (PVD)-based nickel annealed at 550 degrees C. X-ray photoelectron spectroscopy and X-ray diffraction reveal the presence of SiO2 at the Ni-Si interface and the formation of nickel phosphides in addition to nickel silicide. The retardation in silicide growth is attributed to the presence of (111) planes after the texturing process and contaminants in the seed layer. Varying the annealing temperature of fabricated cells from 350 degrees C to 425 degrees C led to a decrease in the average FF from 79.3% to 77.5%. The loss analysis is based on Suns-V-oc measurements, illuminated current-voltage parameters, and dark current-voltage curve fitting based on a three-diode model. It reveals that the FF loss is dominated by increased junction recombination, whereas losses due to third-diode component become significant for annealing at 400 degrees C and higher temperatures. The results highlight the need to carefully tune the seed layer annealing parameters to the interface conditions and junction depth of solar cells.

Silicon nitride (Si 3 N 4 ) waveguide platforms [1,2] are interesting candidates for optical interconnects and sensing applications [3] thanks to high quality passive components, transparency for NIR and visible wavelengths and their compatibility with CMOS process technology. Unfortunately, no native light sources are available for Si 3 N 4 platforms and the integration of active materials, i.e. III-V compounds, is costly and often not CMOS compatible. Metal-halide perovskites are a class of solution processed semiconductors suitable for lasing [4]. Thanks to low-cost deposition by spin coating and low temperature processing (below 100°C) they are a great option for industry relevant on-chip light sources. In this work we apply the MAPbI 3 perovskite onto Si 3 N 4 integrated chips to obtain, to our knowledge, the first integrated perovskite laser.

Metal-halide perovskites are a class of solution processed materials with remarkable optoelectronic properties such as high photoluminescence quantum yields and long carrier lifetimes, which makes them promising for a wide range of efficient photonic devices. In this work, we demonstrate the first successful integration of a perovskite laser onto a silicon nitride photonic chip. High throughput, low cost optical lithography is used, followed by indirect structuring of the perovskite waveguide. We embed methylammonium lead tri-iodide (MAPbI3) in a pre-patterned race-track microresonator and couple the emitted light to an integrated photonic waveguide. We clearly observe the build-up of spectrally narrow lasing modes at room temperature upon a pump threshold fluence of 19.6 μJcm−2. Our results evidence the possibility of on-chip lasers based on metal-halide perovskites with industry relevance on a commercially available dielectric photonic platform, which is a step forward towards low-cost integrated photonic devices.

Here in this work, we study the electro-refractive modulation of CVD grown single layer graphene placed on top of a silicon microring resonator biased using a polymer electrolyte gate. A voltage length product for a phase shift of π, VπL = 2.7 Vmm has been extracted, which is better compared to silicon depletion horizontal and interleaved pn junction type phase modulators and competitive with Silicon-Insulator-Silicon Capacitor modulators.

In this paper we demonstrate that an additional nitrous oxide (N2O) plasma treatment step after the regular SiNx:H anti-reflective coating (ARC) deposition practically eliminates background plating during Ni-Cu contact metallization for c-Si solar cells. This step is relatively simple and could henceforth enable the commercialization of plated Ni-Cu contacts, which is currently inhibited by the creation of localized metal-silicon interfaces due to background plating, among other issues like adhesion. The average active area efficiency and fill-factor of reference cells without any plasma treatment are 17.4% and 73.5%, respectively. N2O plasma treatment before ARC deposition leads to an improved average fill-factor of 75.0%. This improvement is attributed to a reduction in the area affected by background plating by approximately 40% due to the formation of a thin silicon oxy-nitride layer. N2O plasma treatment after ARC deposition is even more effective and can overcome background plating with an average active area cell efficiency and fill-factor of 18.5% and 77.5%, respectively. This performance improvement is attributed to oxidation of the ARC surface by the plasma post-treatment. Analysis of background plating losses is complemented by current-voltage curve fits to a 3-diode model with resistance limited recombination, performed by the freely available program "2/3-Diode Fit". (C) 2015 Elsevier B.V. All rights reserved.

In this work we report for the first time on the creation of thermal acceptors after laser irradiation of a phosphorous doped p -type silicon substrate in ambient atmosphere. The concentration of these defects up to 10 20 cm −3 is leading to a conductivity change from n - to p -type just beneath the surface. Electrochemical capacitance voltage (ECV) measurements followed by resistivity measurements confirm this conversion of conductivity. Secondary ion mass spectrometry (SIMS) measurements show significant oxygen incorporation after laser irradiation. The comparison of saturation current density and lock-in thermography measurements of processed wafers in ambient and in nitrogen atmosphere reveal that these defects are electrically active recombination centres that disappear in absence of oxygen. In simulations of the temperature profile during laser processing a correlation between the pulse energy density ( E P ) and the appearance of thermal acceptors has been observed. The influence of these laser induced acceptor defects on solar cell parameters has been finally investigated. An efficiency loss of 1.3% absolute pertinent to pulse energies usually applied in laser doping process under ambient atmosphere could be avoided by laser processing in nitrogen atmosphere.

The SiC/SiOx hetero-superlattice (HSL) consisting of alternating near-stoichiometric SiC barrier layers for the electrical transport and silicon rich SiOx matrix layers for the quantum dot formation is a promising approach to the realization of silicon quantum dot (Si–QD) absorbers for 3rd generation solar cells. However, additional defect states are generated during post deposition annealing needed for the Si–QD formation causing an increase in sub-band gap absorption and a decrease in PL intensity. Proper passivation of excess defects is of major importance for both the optical and electrical properties of the SiC/SiOx HSL Si–QD absorber. In this work, we investigate the effectiveness of the hydrogen reincorporation achieved with hydrogen plasma in a plasma-enhanced chemical vapor deposition (PECVD) reactor, hydrogen dissociation catalysis in hot-wire chemical vapor deposition (HWCVD) reactor and annealing in forming gas atmosphere (FGA). Both the HSL samples and single layer reference samples are tested. The passivation quality of the hydrogen reincorporation was examined by comparing electrical and optical properties measured after deposition, after annealing and after passivation. In addition, the formation of Si–QDs in SiC/SiOx HSL was evaluated using high resolution transmission electron microscopy. We demonstrated that hydrogen can be successfully reincorporated into the annealed HSL sample and its single layer reference samples. FGA passivation is most effective for SiO1.2 single layers and HSL samples. Passivation with PECVD appeared to be only effective for SiC single layers.

In this paper, the gettering potential of phosphorus dopant pastes used in single-sided screen-printing processes is investigated including the consequences for essential solar cell parameters. These results are supported by minority carrier lifetime measurements with the quasi-steady-state photoconductance method and certified by the analysis of the recombination current density in solar cells on mc-Si wafers. Copyright © 2011 John Wiley & Sons, Ltd.

Comparative structural analyses of a crystallized, 60 nm thick silicon film deposited on quartz substrate were performed using high resolution transmission electron microscopy (HRTEM) and Raman spectroscopy (RS). Both methods suggest high degree of crystallization of the film. The material of the film consists of crystalline grains with sizes up to 20 nm (HRTEM) and the mean size of the grains is ∼4 nm (RS). HRTEM results suggest large scatter of the crystal orientations of the grains. The existence of boundary defects between grains grouped in large agglomerates was also detected by HRTEM. RS analyses indicate large compressive strain in the system and the existence of high pressure Si phases in the material of the film.

We report on electrical transport and quantum confinement in thermally annealed Si/SiO x multiple quantum well (QW) stacks. Results are correlated with the morphology of the stacks. High temperature annealing of Si/SiO x stacks leads to precipitation of excess Si from the SiO x layers, which enhances the degree of crystallization and increases the grain sizes in the Si QWs compared to the conventional Si/SiO 2 system. Moreover, the excess Si forms highly conductive pathways between adjacent Si QWs that are separated by ultrathin silicon oxide barriers. This results in an increase of conductivity by up to 10 orders of magnitude compared to the tunneling dominated transport in Si/SiO 2 stacks. The stacks exhibit a distinct quantum confinement as confirmed by photoluminescence measurements.

Thermo-optical tuning of the refractive index is one of the pivotal operations performed in integrated silicon photonic circuits for thermal stabilization, compensation of fabrication tolerances, and implementation of photonic operations. Currently, heaters based on metal wires provide the temperature control in the silicon waveguide. The strong interaction of metal and light, however, necessitates a certain gap between the heater and the photonic structure to avoid significant transmission loss. Here we present a graphene heater that overcomes this constraint and enables an energy efficient tuning of the refractive index. We achieve a tuning power as low as 22 mW per free spectral range and fast response time of 3 µs, outperforming metal based waveguide heaters. Simulations support the experimental results and suggest that for graphene heaters the spacing to the silicon can be further reduced yielding the best possible energy efficiency and operation speed.

We have investigated the potential to accelerate three-dimensional numeric simulation of silicon solar cell using thread parallelism. The device simulated is a rear side passivated cell with rear point contacts (PERC). The optical and electrical behaviour of the device was simulated with Sentaurus Device (formerly dessis). We show that the simulation run-time on a four socket Opteron 6168 machine is reduced down to 6% compared to the run-time without thread parallelism. Furthermore, limits of time reduction by varying the number of threads up to 48 are studied. Thereby, the number of threads for the optimum use of the hardware resources is determined.

In this paper, we demonstrate single-sided screen-printed emitters in thin monocrystalline Czochralski silicon (Cz-Si) wafers with an improved gettering of iron compared with conventional double-sided POCl3 emitters. The phosphorus dopant pastes used have to be chosen carefully to provide a sufficiently low emitter sheet resistance and to avoid iron contamination. The iron concentration is determined in a non-destructive way from the minority carrier lifetime obtained by quasi-steady-state photoconductance measurements, down to levels not yet demonstrated for screen-printed emitters. In addition, the well-known metastable boron–oxygen complexes in Cz-Si have been transferred into a stable state by light-induced degradation prior to these measurements. Copyright © 2012 John Wiley & Sons, Ltd.

The current-voltage (I-V) characteristics of processed industrial multicrystalline silicon (mc-Si) solar cells usually vary within a narrow range (e.g. +/−1 % abs. efficiency). Nevertheless, occasionally cells with very low efficiencies are produced with loss mechanisms such as local shunts or areas with unusually high recombination. In this paper we investigated industrial mc-Si solar cells with exceptionally low efficiencies in detail by dark and illuminated I-V measurements followed by an analysis based on the two-diode-model to determine the dominant electrical loss mechanisms. Subsequently spatially-resolved lock-in thermography (LIT) measurements were used to localise defect positions in these solar cells. These defects were electrically isolated with a laser. The solar cells were characterised again using the same analysis methods. For shunted cells an efficiency gain of up to 2.4 % absolute was obtained and the shunts disappeared. A detailed investigation of I-V data before and after laser isolation followed by a parameter study based on a two-diode-model is presented.

EPJ Photovoltaics 2, 25001 (2011). doi:10.1051/epjpv/2011024, Published by EDP Sciences, Les Ulis

A MOS-LED and a p-n LED emitting based on the dislocation-related luminescence (DRL) at 1.5 micron were already demonstrated by the authors. Here we report recent observation of the Stark effect for the DRL in Si. Namely, a red/blue-shift of the DRL peak positions was observed in electro- and photo-luminescence when the electric field in the pn-LED was increased/lowered. Fitting the experimental data yields a strong characteristic coefficient of 0.0186 meV/(kV/cm)2. This effect may allow realization of a novel Si-based emitter and modulator combined in a single device.

The vertical charge transport through Si/SiOx multiple quantum wells (QWs) is investigated. Upon thermal annealing, segregation of excess Si from the SiOx layers leads to the formation of highly conductive pathways between Si grains from adjacent QWs separated by ultrathin silicon oxide barriers with barrier heights of 0.53–0.65 eV. Compared to stoichiometric Si/SiO2 layer stacks, conductivity is increased by up to ten orders of magnitude, which opens the way to an efficient charge carrier extraction in photovoltaic systems with distinct quantum confinement.

Charge transport through SiO2∕Si∕SiO2 double-barrier structures (DBSs) and SiO2 single-barrier structures is investigated by low temperature I-V measurements. Resonant tunneling signatures accompanied by a negative differential conductance are observed if silicon quantum dots (Si QDs) are embedded in the amorphous SiO2 matrix. The I-V characteristics are correlated with the morphology of Si QDs extracted from transmission electron microscopy and photoluminescence. Evidence for phonon-assisted tunneling at low voltages has been found in the DBSs. These results show the potential but also the limitation for charge extraction from Si QDs embedded in SiO2.

The current through a resonant tunneling diode consisting of Si quantum dots embedded in a SiO 2 matrix is calculated and the resonance broadening effects caused by distributions of quantum dot diameter and asymmetric barrier thicknesses are simulated. It is demonstrated that a size distribution is extremly critical for the use of these structures as selective energy contacts for hot carrier solar cells, requiring precision at the order of 1 A.

We demonstrate the performance and the reliable fabrication process of a 56 Gb/s wavelength-division multiplexing transmitter module with integrated feedback structures. The device is based on microring silicon depletion modulators, optimized for O-band comb-laser operation.