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Objective The aim of this study was to evaluate the correlation between the various NOTCH3 mutations and their clinical and genetic profile, along with the presentation of a novel mutation in a patient. Methods Here, we describe the phenotype of a patient with cerebral autosomal dominant arteriopathy with subcortical infarcts and leukoencephalopathy (CADASIL) harboring a novel mutation. We also performed an extensive literature research for NOTCH3 mutations published since the identification of the gene and performed a systematic review of all published cases with NOTCH3 mutations. We evaluated the mutation pathogenicity in a great number of patients with detailed clinical and genetic evaluation and investigated the possible phenotype-genotype correlations. Results Our patient harbored a novel mutation in the NOTCH3 gene, the c.3084 G > C, corresponding to the aminoacidic substitution p.Trp1028Cys, presenting with seizures as the first neurologic manifestation. We managed to find a correlation between the pathogenicity of mutations, severity of the phenotype, and age at onset of CADASIL. Significant differences were also identified between men and women regarding the phenotype severity. Conclusions The collection and analysis of these scarce data published since the identification of NOTCH3 qualitatively by means of a systematic review and quantitatively regarding genetic profile and pathogenicity scores, highlight the significance of the ongoing trend of investigating phenotypic genotypic correlations.

Submitted on behalf of EDAA (http://www.edaa.com/); International audience; The limited scalability of current bus topologies for Systems on Chips (SoCs) dictates the adoption of Networks on Chips (NoCs) as a scalable interconnection scheme. Current SoCs are highly heterogeneous in nature, denoting homogeneous, preconfigured NoCs as inefficient drop-in alternatives. While highly parametric, fully synthesizeable (soft) NoC building blocks appear as a good match for heterogeneous MPSoC architectures, the impact of instantiation-time flexibility on performance, power and silicon cost has not been quantified yet. This work details ×pipes Lite, a design flow for automatic generation of heterogeneous NoCs. ×pipes Lite is based on highly customizable, high frequency and low latency NoC modules, that are fully synthesizeable. Synthesis results provide with modules that are directly comparable, if not better, than the current published state-of-the-art NoCs in terms of area, power, latency and target frequency of operation measurements.