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Serial Peripheral Interface (SPI) is a synchronous serial communication whose data or signal transmission involves Chip Select (CS) or Slave Select (SS) pins, Serial Clock (SCK), Master Out Slave In (MOSI), and Master In Slave Out (MISO). In the Arduino Uno, there are four pins that allow Arduino Uno to perform SPI communication. In this research, SPI communication is implemented to expand the output of the Arduino Uno by using the features of the MCP23S17 IC so that the Arduino Uno, which initially has 20 output pins, can expand to 36 output pins.The results of the research show that the Arduino Uno manages to control 36 output pins. 16 output pins from the MCP23S17, 16 output pins from the Arduino Uno, and 4 pins are used for the SPI communication line. The results of this study also show the form of the SPI communication signal from Arduino Uno in declaring 21 registers on MCP23S17, declaring the MCP23S17 pin register as output, and implementing the output using LEDs.

Inter integrated circuit (I2C) is a synchronous serial communication protocol. It is developed for serial communication between electronic devices. I2C is an 8-bit oriented communication protocol. I2C communication employs two wires for communication. I2C synchronous communication protocol has been developed by the Philips company in 1982. It is widely used for connecting low-speed peripheral devices to more complex electronic devices such as processors and microcontrollers for short-distance or intra-board communications. Several versions of I2C protocol have been released in time. In 2007, the version 3.0 was introduced. Version 4, which adds 5 Mbit/s ultra fast-mode, is introduced in 2012. In 2014, the last revision, version 6, was released. In this chapter, we first explain the I2C communication, then provide information about VHDL implementation of I2C communication protocol. We further explain the subject using clear examples.

Serial communication can be divided into two main categories, one is the asynchronous communication and the other is the synchronous communication. RS232 communication is an asynchronous communication type in which start and stop bits are used for the controlling of communication, and the use of controlling bits reduces the transmission efficiency. In synchronous serial communication both the transmitter and receiver use the same clock signal. For this reason, in synchronous communication at least two wires, one is used for clock and the other one is used for data, should be available between transmitter and receiver modules. Serial peripheral interface (SPI) is a synchronous communication protocol developed by Motorola company for the synchronous serial communication of 68HC family of microcontrollers by its peripherals. Later on, this standard became de-facto for serial communication, and it has been adapted by many companies for their products. In this chapter, we first give information about synchronous serial communication and SPI protocol, and then explain how to write VHDL codes to implement SPI protocol for FPGA devices so that they can communicate with electronic devices utilizing SPI communication ports.

The major building block of linear systems is the Phased Locked-Loop(PLL). Contrasting to analog PLL, the clock period profile of digital PLL (DPLL) is often segmented. Hence the phase and/or frequency tracking of traditional PLL’s may suffer from large jitter when Voltage Controlled Oscillator (VCO) operating point shifts from one clock period segment to another. To address this issue, a Low-Jitter CMOS Digital PLL for the generation of the clock in synchronous serial communication systems is presented in this paper. The design of the PLL will be implemented by considering important CMOS parameters like propagation delay, jitter performance, and power dissipation. Designing of digital PLL includes the design of a phase detector, LPF, Error amplifier, and VCO. The VLSI realization of digital PLL is implemented using the TANNER EDA software tool using a 0.18μm CMOS process.

The objectives of this study are (i) to design and fabricate the internet-based real-time fuel consumption reporting system and (ii) to evaluate reliability of the reporting system. Real-time fuel consumption rate of the testing vehicle which was measured from fuel injector control signal by the real-time fuel consumption meter proposed in the previously research was used to be the data for reporting by the internet-based real-time fuel consumption reporting system fabricated in this study. A universal asynchronous receiver transmitter (UART) protocol which is a computer hardware device for synchronous serial communication was used to communicate and transmit data between devices and operation of the system was controlled by the Arduino Mega 2560 microcontroller. Then, the Quectel BC95-B8 module was used to transmit data for recording on virtual database through narrow band internet of thing (NB-IoT) technology which operates in the 900-MHz frequency band. The results could be concluded that (i) the average fuel consumption rate shown on the ThingsBoard application was less than the calculated fuel consumption for about 11.6% due to number and duration of disconnection of the NB-IoT module. (ii) When data is remotely observed via internet connection, it was found that the data displayed in the database has a lag time for less than 9 seconds due to latency of data transmission system. From these points, the system proposed in this study was acceptably to be installed onto truck fleet in private or small-scale carriers for real-time monitoring and internal data collecting applications. However, reliability in data communication and additional feature to reduce data losing were strongly recommended to be applied on the system before it could be extended to be used in larger scale carriers.

This brief relates to communication established through high-speed serial links. A serial communication channel can be formed by grouping multiple high-speed serial communication lanes to achieve greater serial bandwidth. Such channels require circuitry to eliminate relative skew across multiple lanes to ensure data integrity in the receiver. Channel bonding is a mechanism used to synchronize serial communication channels in larger data rate and bandwidth applications. This brief presents an approach to channel bonding that optimizes area, power, and initialization time and yields better performance. The ideas discussed here use a delay-based model and explore the possibility of performing channel bonding in a centralized way. The methodology is deployed in the Aurora Protocol Solution Suite, and a comparative analysis with another state-of-the-art approach is performed.

The most important thing in the Internet of Things (IoT) is data transmission and reception between devices. Accordingly, various types of communication modules have been introduced. Currently, Bluetooth module is the most widely used but it is not suitable for 1:N communication since it performs 1:1 communication through pairing process. To overcome this limitation, the present paper proposes a model of data transmission and reception where 1:N communication can be done based on RF communication module using Arduino serial communication.

It has been increased that communicate each other things such as consumer electronics, mobile equipments and wearable computer with serial communication protocol. The conventional method of SPI and I2C high speed serial communication is widely used with 2 pin of clock and data pin. It has been more important than the speed of data transfer to simplify the hardware structure because the IoT components is reduced the hardware complexity. In this paper, we describe the protocol and implementation of serial data transfer with only one pin. The proposed protocol is suitable for the mobile products that send and receive the small amount of data with low speed and low power consumption.

A distributed data acquisition system based on multi-computer communication among Single-chip Microcomputers is proposed in this paper. The AT89S52 is used as the control core, and multi-computer communication is realized by bus RS485. The hardware construction of the system is introduced. Circuits of each module including the microcomputer, temperature sensor, communication interface and voice alarming are designed. Process of multi-computer communication is described. Programs of master serial transmission and slave serial receiving are written and compiled. Experiments are conducted on temperature measure and acquisition. The results show that a satisfied effectiveness is obtained. A reliable performance can be achieved.

This paper describes the design and development of the communication protocol for the customized data communication switch (FloSwitch). This protocol concentrates on the serial link interface between PCI -e add-on cards and the FloSwitch in the parallel computing system. The serial link is an optical interconnectivity with a bit rate of 6.25Gbps in full duplex mode. The protocol receives data from the PCI-Express PCI -e) add-on cards through the optical link at the FloSwitch and does the necessary process ing on the data (example: floating point addition), and the result is transmitted through the optical link to the destinations. This task is performed according to the command field, other information available in the header and the data. This implementation is done on the Field Programmable Gate Array (FPGA)

This paper introduces asynchronous serial design and communication implementation by TI Co.,Ltd TL16C554 based on dual core processorADSP-BF561 and uClinux. This paper has accomplished multiple serial accessing using share interrupt scheme which has already been used in a wireless sense network.

This paper is based on the high-precision temperature control system and focuses on the realization of the serial communication module.

In order to realize the performance testing and fault diagnosis of communication devices in the Command and Control System, a testing system is proposed. In this paper, a novel communication protocol is developed to realize the communication between the host computer and lower computer of the testing system. As to the different functions of the testing system, the format and sense of the communication messages were introduced in detail. 15 kinds of messages were designed to complete the functions of the open and close of communication serial, data detection ports, the receive and transmission of detection data, the control of the I/O and so on. The communication protocol makes it possible to form the test path and achieve the test of different devices.

Single-chip microcomputer and PC for data transmission,Using a serial port communication protocol,This paper will through the custom serial port communicatio protocol,Through the analysis of the serial port communication protocol packet format,Resolve the Host computer or slavecomputer(AVR MCU) serial port to send and receive over the packet,Shown in serial debugging assistant,And gives the specific implementation method.

In order to improve the accessing capacity for CPU, we design a new storage system based on serial communication. The system utilizes some pieces of DDR SDRAM as storage space. A new serial communication protocol and data frame format is introduced in this study. With the serial communication protocol, the CPU will access the data storage with only two unidirectional serial buses. The storage system has the advantages of easy expansion of capacity, simple structure and flexible application. The whole design is realized in VHDL and verified on Xilinx FPGA development platform EDK.

In this paper, we present Software-Defined Inter-Processor Communication (SDIPC), an application of Software-Define Network (SDN) to low-level communication of processors. To implement the concept of SDIPC, we present Full-Duplex One Serial Communication (FullDOSC) as a platform that uses only one serial interface of processors which aims to alleviate hardware constraints. This, couple with our propose DSL, FullDOSC Language (FRL), allows the communication channel to be dynamically reprogrammed at runtime. We validate our prototype using Verilog HDL simulation. The prototype shows that SDPIC provides flexible and reusable communication for embedded systems.

In view of present using more and more serial communication and even not enough for embedded processor connected peripherals, this paper proposes multiple serial port communication design and implementation based on BF561 platform. With dual-core processor ADSP-BF561 as control core and uClinux as system software platform, using asynchronous serial communication chip TL16C554 by TI Co., Ltd, adopting the way of sharing interrupt to design and realize the multiple serial communication, saving valuable interrupt resources. This scheme successfully apply to the filed of wireless sensor networks for practical project.

In this article, Using the latest Visual studio.net 2005 supplied C # serial class implements PC and single-chip microcomputer of serial communication. Summarizes the card the integrated function of the integrated management system, and probes into how to use C# serial kind of design for serial communication program, through the C# serial class in one card the specific application of integrated management system, and analyzes the application of C# serial kind characteristics, proved the C# serial class can make serial communication program design flexibility, can improve the reliability of the data in the serial port transmission. The actual operation shows that this kind of programming method is stable, reliable and practical.

This brief proposes a novel low–cost serial asynchronous communication protocol analyzer based on ARM7TDMI micro controller. The paper also suggests the hardware configuration & software algorithms to implement such an embedded system. The ARM-7 microcontroller, a 32-bit architecture along with a full fledge 16C550 UART, high speed configurable timers, number of power saving modes & efficient algorithms explained in the paper, becomes very good choice for implementing a portable serial link debugging tool. The system compared to basic analysis tool like oscilloscope & logic analyzer, will not be able to detect voltage levels but will certainly be able to extract timing parameters. The system will be able to detect serial parameters like baud rate, data bits & parity at data layer & refresh rate, ideal time, transmission time, message format at application layer. This system unlike the traditional protocol analyzers can be made very light, compact, low power, low cost & rugged, making it suitable for field operations. The protocol analyzer proposed here has been thought off keeping in view the resource lacking & not so friendly debugging environment of most of the military systems operating in the field.

The application of MSComm widget has achieved serial communication of personal computer and sing-chip micyoco in distributed control system. This communication method has the characteristics of low cost, simple hardware connecting and software designing and convenient operation. It can fulfil the need of serial communication. The serial communication has some valuable reference for monitoring and control system in industry and data collection system.

Serial communication protocol doesn’t have a uniform format due to the differences of its hardware. Thus it’s inconvenience for the test and program design. Through the grammar analysis of the mainstream equipmen Serial protocol, found out a universal protocol format, and also it designed a universal protocol testing tool. It can be use widely for testing many serial communication protocol.

A serial communication protocol according to motion control (MC) system data format has been developed. Based on taking management platform which can be embedded controller or personal computer (PC) as the MC data sending station and motion controller whose core is Digital Signal Processor (DSP) as the MC data receiving station, the detailed situation of how to use the data transfer protocol and the data processing method in MC system is described. Firstly, the organization format of the serial communication data frame is introduced. Then, the relevant saving format of the MC data received by motion controller is described, and the way of how to receive the MC data from serial port is designed. Finally, the whole process of data saving in RAM and data taking out from RAM by motion controller are stated. With the serial communication protocol, a control solution has been provided in the MC system.

The serial communication between microcomputer and other devices is often used in industrial controls, this paper mainly introduces the realization of RS485 serial communication between a single microcomputer and multiple siemens MicroMaster inverters based on Delphi, and as an example this paper explain the generality of the serial communication between microcomputer and others serial devices.

This paper presents a secured I2C (Inter-Integrated Circuit) protocol for Chip-to-Chip communications. The well known AES-GCM cryptographic and authentication algorithm is used to secure this low speed serial communication protocol. This securization allows the use of this standard into applications where security is an issue and the computation resources are constrained. Both the hardware architecture and the protocol are presented. The implementation of the I2CSec presented in the paper has been optimized for FPGA devices.

This paper Introduces a simple and reliable method to connect an ordinary twisted pair RS-232 up to 2048 devices and transmit the communication data more than 10 kilometers by using ZLGCAN interface card, CAN232MB converters and other equipment. The virtual serial port server makes use of CAN-bus network for data communications, guaranteeing the reliability of communic-ation, improving the RS-232 transmission distance, and simplifying the wiring process. Meanwhile user’s operation of the virtual serial port and a standard PC are compatible with the basic serial port operation. However, if there is a large number of continuous transmission of data to the case, the ac-tual serial data transfer rates is determined by the number of virtual serial port.

While MOST is an in-vehicle network which transfers concurrently synchronous data, asynchronous data and control data, it provides high bandwidth synchronous section which can transfer video and audio without buffering. To transfer real time data using synchronous section, connections between source node and sink node, and channel allocation for connections are required. In this paper, we proposed synchronous data transfer method and channel allocation method by constructing MOST network after designing and implementing channel allocation module for using synchronous data section.

The existing mobile learning service is the method that provides data packets in real time. It has some problems of much data packet cost and delay to provide the mobile learning service. In this paper, to solve the problems, we suggest to implementation of the mobile learning system of the new method using serial communication.

In distributed systems, a group of computer should continue to do cooperation in order to finish some jobs. In such a system, a group membership protocol is especially practical and important elements to provide processes in a group with a consistent common knowledge about the membership of the group. Whenever a membership change occurs, processes should agree on which of them should do to accomplish an unfinished job or begin a new job. The problem of knowing a stable membership view is very same with the agreeing common predicate in a distributed system such as the consensus problem. Based on the termination detection protocol that is traditional one in asynchronous distributed systems, we present the new group membership protocol in arbitrary wired networks.

The proposed work in this paper describes the implementation of universal asynchronous transmitter and receiver, that is UART. The UART is a type of a serial communication protocol which serves the purpose of full duplex communication over a serial link. The UART here in is described by hardware description language that is Verilog HDL. The Verilog HDL code has been simulated in the ModelSim 10.1d and implemented on Altera DE1 board.

The new instrument bus LXI has broad prospects for development. LXI-Serial communication Adapter plays an important role in Hybrid Test Systems based on LXI as it connects serial devices with LXI-Bus instruments. This paper gives a design of LXI-Serial communication Adapter based on ARM and FPGA and discusses the details of embedded software and FPGA logic. LXI-Serial Adapter, which provides seamless connectivity between the serial interface instruments and the LXI test system, should be conformed to the LXI Standard and the serial communication protocol. On the basis of thoroughly analyzing about specifications of LXI Standard, network and serial communication specifications, this scheme of this module is brought forward according to the domestic application needs. The actual test indicates that the communication between serial devices and LXI-Bus instruments can be achieved securely.

Intelligent robot control using multiprocessors, sensors, and actuators requires real-time flexible networks for communicating various types of real-time data, e.g., sensing data and interrupt signals. Furthermore, serial data transfer is required for implementing the network using a few wiring lines. To meet these requirements, we propose a CDMA serial communication interface utilizing novel two-step synchronization. The transmitter and receiver chip fabricated with 0.25μm digital CMOS technology achieved 2.7Gcps (chips per second) and 7-multiplex communication. The experimental interface board was developed for demonstrating flexible transfer of multiimage data by installing CDMA chips in addition to an FPGA.

We developed an Asynchronous DC-free Serial Address-Event Representation (AS-AER) protocol. It allows for full-duplex communication and explicit flow control, does not require any clock data recovery or accurate clock relationship between the transmitter and receiver, and is based on AC-coupling that galvanically isolates communicating devices. The proposed reference implementation does not require any specific hardware and can be implemented on low-cost FPGAs and eventually ASICs. Preliminary tests performed at raw bit transfer rate of 100 Mbps confirm a 32 bit maximum event rate of 2.9Meps. Further tests with 16 bit events show a good tolerance to the clock difference between transmitter and the receiver, with no errors for a frequency difference up to ±2 %.

One of the key issues related to guaranteeing synchronous message deadlines in a timed token network (such as fiber distributed data interface) where the timed token medium access control protocol is used is the schedulability test of synchronous traffic (i.e., testing whether or not all synchronous messages can be transmitted before their deadlines, under a given setting of network parameters). Much work has been done on how to assign network parameters appropriately in order to guarantee timely transmission of synchronous traffic. As a result quite a few synchronous bandwidth allocation schemes and some good guidelines on selection of the target token rotation time have been proposed. In contrast, limited research has been conducted on how to effectively test whether or not given network parameters can guarantee timely transmission of all synchronous messages (of a considered synchronous message set) before their deadlines. The previous testing methods for synchronous message schedulability only provide a sufficient (but not necessary) test and therefore fail to always keep effective for any synchronous message set considered. In this paper, we propose two testing methods for determining the schedulability of a synchronous message set with message deadlines no longer than periods. The proposed tests perform better than any previous test in the sense that they are both sufficient and necessary. Some numerical examples are given to compare different testing methods, all of which have demonstrated the superiority of the proposed tests to other existing testing methods.

Channel bonding is a mechanism deployed to synchronize serial communication channels of higher data rate and bandwidth applications. Application that demands higher bandwidth, for example 400G Ethernet, it is not possible to achieve such massive rate using single high speed serial IO channel and aggregating multiple communication-links as a single communication channel makes such ultra-high speed realizable. One challenge that is faced in aggregating communication links is elimination of serial data skew introduced by non-identical trace length of the serial links. Various techniques exist to de-skew lanes in the receive side of the high speed serial transceiver. This paper presents a novel approach to channel bonding that optimizes area, power, initialization time and yields better performance. The idea discussed here is based on a delay based model and explores the possibility of performing channel bonding in a centralized way rather than a distributed way.

This paper presents the hardware implementation of high speed communication protocol for point to point communication. Complete hardware is coded in VHDL and implemented on Xilinx Spartan-3 XC3400 FPGA. Communications between two nodes in this protocol is based on error-checked and retransmit on error scheme. Data filtration is provided to prevent receiver to receive duplicate frame. For error detection we used CRC-8, which has good performance both in case of burst or single bit error. In this protocol CPU has very low overhead during communication. Because processing element only stores the data (pay load of transmitted message) in to transmitter FIFO and further processing like addition of other necessary information and generation of CRC is done independently by hardware designed for communication. This protocol supports the transmission of serial data at variable speed. Maximum serial transmission speed is achieved 10Mbps with 40 MHz quartz clock. Time taken to transmit complete frame is 14 s.

A flexible distributed real-time communication system must support modifications to the message set which it conveys. These changes can require a degree of responsiveness ranging from a few milliseconds to some seconds. In FTT-CAN protocol, the responsiveness of the synchronous communication system depends on the plan duration, which, in general cannot be set arbitrarily short. This paper presents a method that uses the asynchronous messaging system to temporarily convey the synchronous messages until the synchronous messaging system can handle them. Furthermore, methods to evaluate offline if a set of requests for modifications can be timely handled are presented.

Serial Peripheral Interface is a synchronous protocol that allows serial communication between a master and a slave device. The purpose of this paper is to provide a full description of a high speed SPI Master/Slave implementation. The designs are based on Motorola's SPI Block Guide V03.06. This paper discusses design approaches that can offer prospective ways of controlling SPI-bus, incorporating the flexibility of handling two slaves at a time. Starting from the initial specifications till the final physical design, the design phases are systematically elaborated. The whole design is implemented in Verilog 2001, and mapped onto Xilinx's Virtex 5 FPGA devices.

This paper presents the features of a 45mm × 45mm board based on an 8-bit AVR RISC Microcontroller (MCU) with direct Universal Serial Bus (USB) interface. It can be assembled for only 12 dollars and aims to become an open source hardware project. The board has a 10-bit Analog to Digital Converter (ADC), with 8 multiplexed channels and can capture up to 15,000 Samples per second (Sps). Such properties can support the development of a wide range of instruments such as thermometers, electromyographs, electrocardiographs, spirometers, stethoscopes, &c. Its architecture allows signal processing by implementing digital filters and its USB direct interface minimizes the restrictions for proper communication with other devices. Some additional features are the 48-pin In/Out (I/O), the Universal Synchronous and Asynchronous Serial Receiver and Transmitter (UART), the 2-wire Serial Interface (TWI), the Serial Peripheral Interface (SPI) and the 16 touch channels, among others.

Communication between PC and Modem is common, while communication between single-chip computer and Modem is rare. This article will elaborate serial communication between single-chip computer and GPRS modem. The wide use of serial communication will enable various transmission units to connect as one organically and exchange data and information in safe and reliable manner. However, since signal of each transmission channel is different, the serial port in use should be various. Therefore, in order to realize communication among units, it is necessary to involve serial port conversion among each unit.

In the paper, the serial communication in the queue system is discussed. Firstly the data send and receive is research and the routine diagram of send and receive is drawn up; secondly the data frame from main computer to end point is introduced; finally the realization of data process and data integrality is discussed. In all the paper, the realization process of the serial communication in the queue is described.

In this paper, a unit designed for purpose data programming to multi serial DataFlashs has been proposed. In hardware, it is composed of one MCU(Micro Control Unit) and multi serial DataFlashs connected to MCU by SPI interface which result to easy design and save GPIOs; in software, an Object-Oriented cooperative scheduler is applied and runs on the microcontroller, and a communication software used to provide data by USB connection runs on the computer. In order to program the data which in the purpose file to multi serial DataFlashs fast and correctly, the strategies that how to program multi serial DataFlashs is extremely important. The results of performance evaluations show that an Object-Oriented cooperative scheduler can deal with multi serial DataFlashs programming efficiently. It is improved the efficiency and reusability and decreased the complexity of the software.

By analyzing the current serial communication, used in a popular monitor system composed of PC, GOT and PLC, introduced a new design and implementation plan of serial communication based on Vb and Programming Interface Protocol. System achieved the efficient, stable and reliable communication under simple attachment without any mitsubishi's special communication board. The communication applied mitsubishi FX series PLC programming interface protocol, no longer need to set up the D8120, simplified the PLC program; Under this protocol and based on VB6.0 development environment,write the serial communication program adapt to FX full series,the program make the PC can read/write the PLC soft equipment and forced ON/OFF directly. In the actual application, No matter accuracy and stability of communication were to achieve requirements of industrial control system.

In recent decades, MCUs employing serial communication have been widely used in instrumentation industry. Many MCU systems need to disable interrupt when it operating some special function with its peripherals. On the other hand, they won’t want to lose any communication data with host computer or other MCUs. A method namely “Starting by Interrupt, Receiving in Query mode” (SIRQ) is proposed to make the MCU system fulfil the stringent timing requirements by its peripherals while remaining stable communication with the host computers. The implementation method, flowchart and part of source code are presented. This method has been verified and proved to be simple and robust in some real products. Index Terms MCU, Serial Communication, Interrupt