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This paper presents the design of a low-power electrocardiogram (ECG) readout system suitable for use in recording ECG from dry electrodes. To minimize the system’s overall power consumption, we employ a very high gain (69 dB) along with a discrete-time signal-folding technique to prevent signal saturation in the amplification stage to reduce the required resolution of the analog-to-digital converter (ADC) to only 8 bits. Fabricated in a standard 0.18- $\mu {\mathrm {m}}$ CMOS process with an active area of 1.07 mm2, the proposed readout system exhibits an input impedance exceeding $1~{\mathrm {G}} \Omega$ in a bandwidth of 0.5-150 Hz, an overall input-referred noise of $2.9~\mu {\mathrm {V}}_{{\mathrm {rms}}}$ , an input range of 12.5 mVpp, while consuming a total current of $4.5~\mu \text{A}$ from a 1.2-V supply voltage.

This work presents the design and analysis of a compact low-power motion artifact estimator for reducing the input dynamic range in wearable ECG acquisition systems. The estimator employs a novel mixed-signal architecture that performs adaptive filtering on the electrode impedance information to derive a cancellation signal to suppress the motion artifact at the input of the acquisition system. A detailed noise analysis and optimization strategies are also provided to minimize the estimator's noise referred to the acquisition system's input. Fabricated in a 0.18- $\mu$ m CMOS process and operating from a 1-V supply, the estimator occupies an active area of 0.11 $\text{mm}^2$ and consumes 2.6-3.2 $\mu$ W of power depending on the final weights used. The low power consumption and small area thus make the estimator suitable for local placement at each recording channel in multi-channel ECG acquisition systems.