27 results on '"Temes, G. C."'
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2. Low-power parasitic-insensitive switched-capacitor integrator for delta-sigma ADCs.
3. Double-sampled ΔΣ modulator with relaxed feedback timing.
4. Dynamic biasing scheme for high-speed/ low-power switched-capacitor stages.
5. Enhanced split-architecture Δ-Σ ADC.
6. Noise-shaped filter implementation.
7. Power efficient noise-coupled ΔΣ ADC with simple delay cells.
8. Switched-R tuning technique for Gm-C filters.
9. Power-up calibration techniques for double-sampling ΔΣ modulators.
10. Improved architecture for low-distortion ΔΣ ADCs.
11. Noise-coupled continuous-time delta-sigma ADCs.
12. Single-loop ΔΣ modulator with extended dynamic range.
13. Split-set data weighted averaging.
14. Multi-step capacitor-splitting SAR ADC.
15. Two-step split-junction SAR ADC.
16. Efficient technique for excess loop delay compensation in continuous-time ▵ ∑ modulators.
17. Accuracy-enhanced switched-capacitor stages using low-gain opamps.
18. High-precision switched-capacitor integrator using low-gain opamp.
19. Efficient floating double-sampling integrator for ΔΣ ADCs.
20. Noise-coupled ΔΣ ADCs.
21. High-linearity SAR-VCO MASH ΔΣ ADC with second-order noise shaping.
22. Wide-band high-accuracy ΔΣ ADC using segmented DAC with DWA and mismatch shaping.
23. Fully passive third-order noise shaping SAR ADC.
24. Passive switched-capacitor filter with complex poles for high-speed applications.
25. Two-step incremental analogue-to-digital converter.
26. Noise-shaping SAR ADC using three capacitors.
27. Multi-step extended-counting analogue-todigital converters.
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