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Breast cancer accounts for the second most cancer diagnoses among women and the second most cancer deaths in the world. In fact, more than 11000 women die each year, all over the world, because this disease. The automatic breast cancer diagnosis is a very important purpose of medical informatics researches. Some researches has been oriented to make automatic the diagnosis at the step of mammographic diagnosis, some others treated the problem at the step of cytological diagnosis. In this work, we describes the current state of the ongoing the BC automated diagnosis research program. It is a software system that provides expert diagnosis of breast cancer based on three step of cytological image analysis. The first step is based on segmentation using an active contour for cell tracking and isolating of the nucleus in the studied image. Then from this nucleus, have been extracted some textural features using the wavelet transforms to characterize image using its texture, so that malign texture can be differentiated from benign on the assumption that tumoral texture is different from the texture of other kinds of tissues. Finally, the obtained features will be introduced as the input vector of a Multi-Layer Perceptron (MLP), to classify the images into malign and benign ones. Key words: Breast Cancer, GVF-Snake, Segmentation, Wavelet feature extraction, Neural Network, MLP classification., INTRODUCTION Medical automatic diagnosis is still considered as a hard task. In fact, medical diagnosis requires an expert able to cope with the uncertain cases only by eyeing the visible [...]

Abstract: In this study we present the architecture for use in high-performance switching networks with support quality of service (QoS) guarantees. Quality of services guarantees in terms of delay, through-put [...]

Abstract: In the systems on chip (SoC) design, the synthesis of communication architecture constitutes the bottleneck which can affect the performances of the system. Various schemes and protocols can be [...]

Abstract: The Quality of Service Network on Chip (QNoC) is the most perferment solution that provides low latency transfers and power efficient System on Chip (SoC) interconnect. This study presents [...]

Abstract: This study have presented a filed programmable gate array implementation of a real time video smoothing algorithm. In comparison with smoothing video techniques like deblocking filters in H.264 or [...]

This paper presents an approach to integrate intellectual properties (IPs) based systems on chip (SoCs). The aim is to synthesize communication units using co-simulation environment and a stochastic process. The proposed approach allows to bound communication memories for different loading rates of the master processor. According to the chosen communication unit while interconnecting IPs components, this approach also allows to refine communication structures in order to lead to a model easily mappable onto the target architecture. The approach has been experimented and validated through a detailed case study concerning the verification and the integration of the discrete and direct wavelet transform (DDWT) IP in a mixed hardware/software architecture. Software partitions are executed on the ARM7 processor and hardware partitions are executed on the ModelSim simulator. The used co-simulation tool is Seamless CVETM of Mentor Graphics. A library of adaptation protocols of IP blocs to the environment as well as a set of standard communication units (RAM, DPRAM, FIFOs) have been also developed and used. Keywords: IPs; Verification; Integration; Co-simulation; SoCs; Communication synthesis